IPC-SM-782A-表面贴装焊盘图形设计标准.pdf.pdf - 第124页

6.0 TOLERANCE AND SOLDER JOINT ANALYSIS Figure 4 provides an analysis of tolerance assumptions and resultant solder joints based on the land pattern dimensions shown in Figure 3. Tolerances for the component dimensions, …

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5.0 LAND PATTERN DIMENSIONS
Figure 3 provides the land pattern dimensions for SSOIC
components. These numbers represent industry consensus
on the best dimensions based on empirical knowledge of fab-
ricated land patterns.
In the table, the dimensions shown are at maximum material
condition (MMC). The least material condition (LMC) should
not exceed the fabrication (F) allowance shown on page 4.
The LMC and the MMC provide the limits for each dimension.
The dotted line in Figure 3 shows the grid placement court-
yard which is the area required to place land patterns and
their respective components in adjacent proximity without
interference or shorting. Numbers in the table represent the
number of grid elements (each element is 0.5 by 0.5 mm) in
accordance with the international grid detailed in IEC publica-
tion 97.
RLP No.
Component
Identifier Z (mm) G (mm) X (mm)
YCDE
Placement Grid
(No. Grid
Elements)ref (mm) ref (mm) ref (mm) ref (mm)
330A SS048 11.60 7.20 0.40 2.20 9.40 14.61 0.64 24x34
331A SS056 11.60 7.20 0.40 2.20 9.40 17.15 0.64 24x38
332A S064 15.40 11.40 0.50 2.00 13.40 24.80 0.80 32x54
Figure 3 SSOIC land pattern dimensions
▼
D
X
▼
▼
E
▼
▼
GCZ
▼
▼
▼
▼
▼
▼
▼
Full radius typical
Grid placement courtyard
▼
▼
Y
▼
▼
IPC-782-9-2-3
IPC-SM-782
Subject
SSOIC
Date
5/96
Section
9.2
Revision
A
Page3of4
6.0 TOLERANCE AND SOLDER JOINT ANALYSIS
Figure 4 provides an analysis of tolerance assumptions and
resultant solder joints based on the land pattern dimensions
shown in Figure 3. Tolerances for the component dimensions,
the land pattern dimensions (fabrication tolerances on the
interconnecting substrate), and the component placement
equipment accuracy are all taken into consideration.
Figure 4 provides the solder joint minimums for toe, heel, and
side fillets, as discussed in Section 3.3. The tolerances are
addressed in a statistical mode, and assume even distribution
of the tolerances for component, fabrication, and placement
accuracy.
Individual tolerances for fabrication (‘‘F’’) and component
placement equipment accuracy (‘‘P’’) are assumed to be as
given in the table. These numbers may be modified based on
user equipment capability or fabrication criteria. Component
tolerance ranges (C
L
,C
S
, and C
W
) are derived by subtracting
minimum from maximum dimensions given in Figure 2. The
user may also modify these numbers, based on experience
with their suppliers. Modification of tolerances may result in
alternate land patterns (patterns with dimensions other than
the IPC registered land pattern dimensions).
The dimensions for minimum solder fillets at the toe, heel, or
side (J
T
,J
H
,J
S
) have been determined based on industry
empirical knowledge and reliability testing. Solder joint
strength is greatly determined by solder volume. An observ-
able solder fillet is necessary for evidence of proper wetting.
Thus, the values in the table usually provide for a positive sol-
der fillet. Nevertheless, the user may increase or decrease the
minimum value based on process capability.
RLP No.
Tolerance
Assumptions (mm)
Solder Joint
Toe (mm) Heel (mm) Side (mm)
FPC
L
T
T
min J
T
max C
S
J
H
min J
H
max C
W
J
S
min J
S
max
330A 0.10 0.10 0.64 0.46 0.79 0.96 0.39 0.88 0.10 0.01 0.10
331A 0.10 0.10 0.64 0.46 0.79 0.96 0.39 0.88 0.10 0.01 0.10
332A 0.10 0.10 0.50 0.44 0.70 0.65 0.49 0.82 0.15 0.00 0.10
Figure 4 Tolerance and solder joint analysis
Zmax
Lmin
▼
▼
▼
▼
1
/2 T
T
J
T
min
Zmax = Lmin + 2J
T
min + T
T
Where:
J
T
min = Minimum toe fillet
T
T
= Combined tolerances
at toe fillet
Smax
J
H
min
Gmin = Smax - 2J
H
min - T
H
Where:
J
H
min = Minimum heel fillet
T
H
= Combined tolerances
at heel fillet
1
/2 T
H
Xmax
Xmax = Wmin + 2J
S
min + T
S
Where:
J
S
min = Minimum side fillet
T
S
= Combined tolerances
at side fillet
▼
▼
Toe Fillet
▼
▼
▼
Heel Fillet Side Fillet
▼
▼
▼
▼
▼
J
T
max
J
H
max
J
S
min
▼
▼
▼
▼
▼
▼
▼
▼
▼
▼
▼
▼
▼
▼
▼
Gmin
▼
1
/2 T
S
J
S
max
▼
▼
▼
Wmin
▼
IPC-782-9-2-4
IPC-SM-782
Subject
SSOIC
Date
5/96
Section
9.2
Revision
A
Page4of4
1.0 SCOPE
This subsection provides component and land pattern dimen-
sions for small outline packages (SOP components) with gull-
wing leads on two sides. Basic construction of the SOP
device is also covered. At the end of this subsection is a list-
ing of the tolerances and target solder joint dimensions used
to arrive at the land pattern dimensions.
2.0 APPLICABLE DOCUMENTS
See Section 9.0 and the following for documents applicable to
this subsection.
2.1 Electronic Industries Association of Japan (EIAJ)
EIAJ-7402-1
General Rules for the Preparation of Outine
Drawings of Integrated Circuits Small Outline Packages
3.0 COMPONENT DESCRIPTIONS
3.1 Basic Construction
IPC-SM-782 has defined center-
to-center spacing for the land pattern slightly differently than is
indicated in the EIAJ specification ED 7402-1.
This specification allows for 6 families of the SOP. EIAJ clas-
sifies the families by the center-to-center distance of the land
patterns and the outer extremities of the leads (dimension ‘‘L’’
in IPC-SM-782). The basic construction of the SOP specified
by EIAJ is the same construction as for SOIC specified by
JEDEC. Both have gullwing leads on 1.27 mm centers.
The EIAJ specification allows for a number of positions of the
components to be in any of the families (e.g., body width). The
sizes shown in Figure 2 are the most common, however, there
are Type II SOP 14s and there are also Type I SOP 16s. See
Figure 2.
3.1.1 Termination Materials Leads must be solder-
coated with a tin/lead alloy. The solder should contain
between 58 to 68% tin. Solder may be applied to the leads by
hot dipping or by plating from solution. Plated solder termina-
tions should be subjected to post-plating reflow operation to
fuse the solder. The tin/lead finish should be at least 0.0075
mm [0.0003 in] thick.
3.1.2 Marking Parts are available with or without part
number markings. Usually an index mark indicates pin 1.
3.1.3 Carrier Package Format Bulk rods, 24 mm tape/
8–12 mm pitch is preferred for best handling. Tube carriers
are also used.
3.1.4 Resistance to Solder Parts should be capable of
withstanding ten cycles through a standard reflow system
operating at 215°C. Each cycle shall consist of 60 seconds
exposure at 215°C. Parts must also be capable of withstand-
ing a minimum of 10 seconds immersion in molten solder at
260°C.
IPC-782-9-3-1
Figure 1 SOPIC construction
IPC-SM-782
Surface Mount Design
and Land Pattern Standard
Date
5/96
Section
9.3
Revision
A
Subject
SOP
Page1of4