IPC-SM-782A-表面贴装焊盘图形设计标准.pdf.pdf - 第13页

RS-471 Symbol and Label for Electrostatic Sensitive Devices RS-481 T ape and Reel Speciﬁcation 2.3 Joint Industry Standards (IPC) 1 J-STD-001 Requirements for Soldered Electrical and Elec- tronic Assemblies J-STD-002 Sol…

• Small in size, real estate constrained

• Able to accommodate large amounts of memory

• Light in weight

• Able to accommodate several large, high lead count com-

plex ICs, such as ASICs and silicon arrays

• Able to function at high frequencies and speeds

• Able to transmit little or no noise, EMI and RFI resistant

• Able to be built in large volumes using automation

Currently, most SMT boards that have 50 or more compo-

nents use a combination of SMT and through-hole tech-

nologies. The mix is a function of component availability,

multiplicity of vendors, and cost. A mix of 80 percent SMT

and 20 percent through-hole parts is very common. How-

ever, the number of 100% SMT assemblies is increasing.

Fine Pitch Technology (FPT) involves a process change as

well as a packaging family, because the package to board

assembly steps are different than SMT. For example, sev-

eral commercially available FPT parts require lead excise

and forming prior to placement. They are encapsulated or

molded with plastic and delivered to users as a separate

packaged device, and these parts may be shipped with a

molded guard-ring or a slide carrier securing the leads in

place. The full encapsulated device will be used for direct

board mounting.

FPT packages are available under package names such as

PQFP (Plastic Quad Flat Pack), CQFP (Ceramic Quad Flat

Pack), QFP (Quad Flat Pack) and VSOIC (Very Small Out-

line Integrated Circuits).

2.0 APPLICABLE DOCUMENTS

The following documents, of the issue currently in effect

form a part of this document to the extend speciﬁed herein.

Other documents listed are for reference purposes to assist

the user.

2.1 IPC

IPC-A-48 Surface Mount Land Pattern Artwork (Mantech)

IPC-A-49 Surface Mount Land Pattern Artwork (IPC-SM-

782A)

IPC-T-50 Terms and Deﬁnitions

IPC-SC-60 Post Solder Solvent Cleaning Handbook

IPC-AC-62 Post Solder Aqueous Cleaning Handbook

IPC-2221 Generic Standard on Printed Board Design

IPC-6012 Qualiﬁcation and Performance Standard for

Rigid Printed Boards

IPC-D-330 Printed Wiring Design Guide

IPC-A-610 Acceptability of Printed Board Assemblies

IPC-7711 Rework of Electronic Assemblies

IPC-SM-780 Guidelines for Component Packaging and

Interconnection with Emphasis on Surface Mounting

IPC-SM-784 Guidelines for Chip-on-Board Technology

Implementation

IPC-SM-785 Guidelines for Accelerated Reliability Testing

of Surface Mount Solder Attachments

IPC-SM-786 Recommended Procedures for Handling of

Moisture Sensitive Plastic IC Packages

IPC-AJ-820 Assembly and Joining Handbook

IPC-CC-830 Electrical Insulating Compounds for Printed

Board Assemblies

IPC-SM-840 Qualiﬁcation and Performance of Permanent

Polymer Coating (Solder Mask) for Printed Boards

IPC-1902/IEC 60097 Grid System for Printed Circuits

2.2 Electronic Industries Association

IS-30 Surface Mount Resistors

JEDEC-95 JEDEC Registered and Standard Outlines for

Solid State Products

EIA-PDP-100 Registered and Standard Mechanical Out-

lines for Electronic Parts

RS-198 Ceramic Dielectric Capacitors

RS-228 Fixed Electrolytic Tantalum Capacitors

RS-367 Dimensional and Electrical Characteristics Deﬁn-

ing Receiver Type Sockets

RS-376 Fixed Film Dielectric Capacitors in Metallic and

Non- Metallic Cases for D.C. Application

RS-415 Dimensional and Electrical Characteristic Deﬁn-

ing Dual-In-Line-Type Sockets

RS-428 Type Designation System for Microelectronic

Devices

1. IPC, 2215 Sanders Road, Northbrook, IL 60062-6135

2. Electronic Industries Association, 2001 Eye Street N.W., Washington, DC 20006

IPC-SM-782A December 1999

RS-471 Symbol and Label for Electrostatic Sensitive

Devices

RS-481 Tape and Reel Speciﬁcation

2.3 Joint Industry Standards (IPC)

J-STD-001 Requirements for Soldered Electrical and Elec-

tronic Assemblies

J-STD-002 Solderability Tests for Component Leads, Ter-

minations, Lugs, Terminals and Wires

J-STD-003 Solderability Tests for Printed Boards

2.4 American Society of Mechanical Engineers

ANSI Y14.5M—1982 Dimensioning and Tolerancing

3.0 DESIGN REQUIREMENTS

3.1 Terms and Definitions

Terms and deﬁnitions used

herein are in accordance with IPC-T-50 except as otherwise

speciﬁed. Note: Any deﬁnition denoted with an asterisk (*)

is a reprint of the deﬁnition deﬁned in IPC-T-50.

*Assembly – A number of parts of subassemblies or any

combination thereof joined together.

Note: When this term is used in conjunction with other

terms listed herein, the following deﬁnitions shall prevail.

Assembly, double-sided – A packaging and interconnecting

structure with components mounted on both the primary

and secondary sides.

Assembly, multilayer printed circuit – a multilayer printed

circuit board on which separately manufactured compo-

nents and parts have been added.

Assembly, multilayer printed wiring – a multilayer printed

wiring board on which separately manufactured compo-

nents and parts have been added.

Assembly, packaging and interconnecting (P&IA) – The

generic term for an assembly that has electronic compo-

nents mounted on either one or both sides of a packaging

and interconnecting structure.

Assembly, printed board – an assembly of several printed

circuit assemblies or printed wiring assemblies, or both.

Assembly, printed circuit – a printed circuit board on

which

separately manufactured components and parts have been

added.

Assembly, printed wiring – a printed wiring board on

which

separately manufactured components and parts have been

added.

Assembly, single-sided – A packaging and interconnecting

structure with components mounted only on the primary

side.

*Base material – The insulating material upon which the

conductor pattern may be formed. The base material may

be rigid or ﬂexible. It may be a dielectric sheet or insulated

metal sheet.

Basic dimension – Theoretically exact location of a com-

ponent feature, indicated by a symbol or a number in a box.

(The tolerance on a basic dimension provides the limits of

the variation from the basic dimension location.)

Castellation – Metallized features that are recessed on the

edges of a chip carrier which are used to interconnect con-

ducting surfaces or planes within or on the chip carrier.

Chip carrier – A low-proﬁle rectangular component pack-

age, usually square, whose semiconductor chip cavity or

mounting area is a large fraction of the package size and

whose external connections are usually on all four sides of

the package.

Chip-on-board (COB) – Integrated circuit device mounted

directly to the printed board and interconnected with wire

bonds.

Coefficient of thermal expansion (CTE) – The linear ther-

mal expansion per unit change in temperature.

Component – A separable part of a printed board assembly

which performs a circuit function (e.g., a resistor, capaci-

tor, transistor, etc.)

Component mounting site – A location on a P&I structure

that consists of a land pattern and conductor fan-out to

additional lands for testing or vias that are associated with

the mounting of a single component.

*Conductive pattern – The conﬁguration or design of the

conductive material on the base material. (Includes conduc-

tors, lands, and through connections when these connec-

tions are in integral part of the manufacturing process.)

*Conductor – A single conductive path in a conductive

pattern.

Constraining core – A supporting plane that is internal to

a packaging and interconnecting structure.

*Dual in-line package (DIP) – A component which termi-

nates in two straight and parallel rows of pins or lead

wires.

Fine-pitch technology (FPT) – Surface mounted compo-

nents with a lead or termination pitchof 0.63 mm or less.

Fiducial – A feature of the PB used to provide common

measurable points for all steps in the assembly process.

Flat pack – A component with two straight rows of leads

(normally on 1.27 mm centers) which are parallel to the

component body.

3. Publications are available from the American Society of Mechanical Engineers, 345 East 47th St., New York, NY 10017

December 1999 IPC-SM-782A

Footprint – (see preferred term ‘‘Land Pattern’’)

*Grid – An orthogonal network of two sets of parallel

equidistant lines used for locating points on a printed

board. (Note: Connections should be located on the cross-

points of the gridlines. The position of conductors may be

independent of the grid, i.e., not necessarily following the

gridlines.)

Integrated circuit (IC) – An assembly of miniature elec-

tronic components simultaneously produced in batch pro-

cessing, on or within a single substrate to perform an elec-

tronic circuit function.

*Jumper wire – An electrical connection that is a part of

the original design, added between two points on a printed

wiring board after the intended conductive pattern is

formed.

*Land – A portion of a conductive pattern usually, but not

exclusively, used for the connection, or attachment, or both

of components.

Land pattern – A combination of lands intended for the

mounting, interconnection and testing of a particular com-

ponent.

Leadless chip carrier – An electronic component whose

external connections consist of metallized terminations

containing a single integrated circuit chip.

Leaded chip carrier – An electronic component whose

external connections consist of leads eminating from the

sides of the package, which contains a single circuit chip.

*Master drawing – A document that shows the dimen-

sional limits or grid locations applicable to any or all parts

of a printed board (rigid or ﬂexible), including the arrange-

ment of conductive and nonconductive patterns or ele-

ments; size, type, and location of holes; and any other

information necessary to describe the product to be fabri-

cated.

Mixed mounting technology – A component mounting

technology that uses both through-hole and surface mount-

ing technologies on the same packaging and interconnect-

ing structure.

*Module – A separable unit in a packaging scheme

Nominal – Design dimension for the size of a feature. (The

tolerance on a nominal dimension gives the limits of varia-

tion of a feature size.)

Packaging and interconnecting structure (P&IS) – The

generic term for a completely processed combination of

substrates, metal planes or constraining cores, and intercon-

nection wiring used for the purpose of mounting compo-

nents.

*Plated-through hole (PTH) – A hole in which electrical

connection is made between internal or external conductive

patterns, or both, by the plating of metal on the wall of the

hole.

Primary side – That side of the packaging and intercon-

necting structure that contains the most or more complex

components. The primary side establishes layer one of the

P/I structure. (The same as the ‘‘component side’’ in

through-hole component mounting technology.)

*Printed board – The general term for completely process

printed circuit or printed wiring conﬁgurations. It includes

rigid or ﬂexible, single, double and multilayer boards.

*Printed wiring – The conductive pattern intended to be

formed on a common base, to provide point-to-point con-

nection of discrete components, but not to contain printed

components.

*Registration – The degree of conformity of the position

of a pattern, or a portion thereof, with its intended position

or with that of any other conductor layer of a board.

Secondary side – That side of the packaging and intercon-

necting structure that is opposite of the primary side. (The

same as the ‘‘solder side’’ in through-hole component

mounting technology.)

Single in-Line package (SIP) – A component which termi-

nates in one straight row of pins and lead wires.

Static electricity – An electrical charge that has accumu-

lated or built up on the surface of a material.

Static electricity control – A technique where materials and

systems are employed to eliminate/discharge static electric-

ity buildup by providing continuous discharge paths.

*Supported hole – A hole in a printed board that has its

inside surface plated or otherwise reinforced.

Supporting plane – A planar structure that is a part of a

packaging and interconnecting structure to provide

mechanical support, thermo-mechanical constraint, thermal

conduction and/or electrical characteristics. (It may be

either internal or external to the packaging and intercon-

necting structure.)

Surface mount technology (SMT) – The technology where

electrical connection of components is made to the surface

of a conductive pattern of a printed board and does not uti-

lize component lead holes.

Thermal expansion mismatch – The absolute difference in

thermal expansion of two components.

*Through connection – An electrical connection between

conductive patterns on opposite sides of an insulating base,

e.g., plated-through hole or clinched jumper wire.

Through-hole technology (THT) – An assembly process

for mounting component packages where leads are passed

through supported (plated through) or unsupported (bare)

holes in an interconnection substrate.

*Tooling feature – A speciﬁed physical feature on a printed

board or a panel such as a marking, hole, cut- out, notch,

IPC-SM-782A December 1999