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Choosing a functional test solution means that it must satisfy (at least) three fundamental requirements: - The solution should meet present and future performance needs - The solution should retain the ability to adequa…

VALID LINE

Functional test platform

Choosing a functional test solution means that it must satisfy (at least) three fundamental requirements:

- The solution should meet present and future performance needs

- The solution should retain the ability to adequately mimic features of old, to-be-replaced equipment.

- The solution should include comprehensive hardware and software tools and yet be fully open to COTS (Commercial

Off-The-Shelf) hardware and software.

The

Valid Line

is the ultimate integrated functional test

solution, capable of meeting and exceeding these

requirements for analog, digital and mixed-signal testing, both

at board level (SRA/SRU) and box level (LRA/LRU), in the

factory and in the field.

The

Valid Line

benefits from Seica’s unrivalled experience in

testing complex types of electronic boards and assemblies,

featuring advanced DSP and FPGA-driven digital technology

and a comprehensive set of test generation, debug and

diagnostic proven solutions.

The

Valid Line

has a proven track record of successfully

replacing obsolete functional test equipment, from GR179X to

GR275X, from L200 to L300, from S720 to S790 and custom

STE for box level test and validation.

Offering the best test-oriented stimulus and measurement

dedicated hardware, the Valid Line can readily be extended to

incorporate GPIB, LXI and VXI COTS

solutions. Operating under a powerful

test-oriented environment (VIVA), the

system can also be fully directed by

other test sequencers, like N.I.

TestStand or Agilent VeePRO, and/or

combine use of a variety of

programming languages like C++,

VBS, and programming environments

like LabWindows/CVI, LabView, and

others.

HIGH-PERFORMANCE

Valid line

At the heart of the system is the VIP test backplane.

Controlled by the system PC through the high-speed fiber-

optic bus, the VIP test backplane hosts channel cards,

routing cards and internal instrumentation. The VIP test

backplane offers unrivalled flexibility, with full connection to

the test receiver, ample room for expansion, built-in signal

and power buses to accommodate all requirements of

stimuli and measurement distribution to the UUT (Unit

Under Test).

The Valid Line can be provided with a traditional SEICA,

Mac-ODU or Virginia Panel VP12 Receivers. Custom

solutions using other technologies (i.e. to retain existing

fixtures) are also available. All solutions offer a system

capacity of up to 1,024 channels, which can be doubled by

adding a second test backplane.

Latest generation of F50 digital channel cards offer each 32

channels with 25MHz dynamic performance, local timing

phases and windows, local multiple level references, parallel

and serial operating mode. Each channel provides

dynamically high speed stimuli and responses, with large

backing memory and algorithmic capabilities. Other

channels’ features include CRC, pulse generation control,

POD functionalities for 1149.2 applications, direct time and

frequency measurement. Flexible control assures Legacy

Replacement of obsolete equipment as well as easy and

direct coping with bus-testing, serial-mode testing, IEEE

1149.2 and other protocols.

F50 cards include analog switching on each channel to be

mated, at fixture level or in the system, with analog channel

cards, thus offering full hybrid digital/analog capability.

Analog channel cards offer a unique 3D architecture which

allows COTS instruments to be directly connected through

eight external bnc I/Os. Routing can then be local with

independent clusters of 32 channels, or system-wide

through the 8-line analog bus of the VIP test backplane. This

unique architecture can easily cope with test scenarios

requiring a large number of analog stimuli to be applied

simultaneously to the UUT.

If high current stimuli need to be switched, other channel

cards are available, with dual connection to the analog bus

or to the separate power bus.

VERSATILE TEST ARCHITECTURE

The main analog test resource is based around the ACL

subset, which provides multiple, DSP-driven AC/DC

stimuli and measurement automatically routed to all

channels, to reproduce the required test scenario and to

provide fast and accurate results.

Automotive, aerospace and industrial applications often

require providing parallel test of to the UUT, with several

different analog stimuli applied and synchronized

measurements taken. An example of this is the case of

SRU or LRU interfacing sensors or driving tools. Such

situations are impossible to reproduce on conventional

ATE without the addition of complex active electronics on

the fixture. Not so with the iFUN parallel test solution

offered in the Valid Line. The iFUN hosts 16 independent,

DC-programmable analog channels; if required, the iFUN

can mount up to eight additional resources, in any

combination out of the currently available AWG and

Digitizer modules. Multiple iFUN modules can be installed

in the system, thus responding to the most exotic

SRU/LRU test needs.

Whenever needed, the system offers ample capacity to

add external GPIB, VXI or LXI instruments to meet RF, HV

or load specifications,

For high performance digital, to best serve military

contractual requirements, the Valid Line can also be

configured with the Talon T964 Digital Resource Modules.

Fully integrated in the test generation, run-time and

diagnostic environment of the Valid Line, the Talon T964

cards provide ultimate digital test performance at 50MHz

with 1nsec edge placement resolution and tester per pin

architecture.

FLEXIBLE TEST-ORIENTED

INSTRUMENTATION

FACTORY AND DEPOT SRU/LRU FUNCTIONAL ATE