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SEMI F42-0600 © SEMI 199 9, 2000 4 9.2.3 De- ener gize and lockout/tagou t t he DUT PO C. 9.2.4 De- ener gize and lockout/tagou t th e voltage supply at the DUT utility p ower source branch circuit breaker. 9.2.5 Identif…

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SEMI F42-0600 © SEMI 1999, 20003
7.2.6 Proper connections should be traced and verified
before energizing.
7.3 Equipment Safety
7.3.1 The sag generator should have a fail-safe design.
NOTE 5: Subjecting equipment to repeated voltage sags of
less than 80% nominal for longer than 3 seconds may damage
equipment.
7.3.2 The sag generator should be protected by an
appropriately sized branch circuit breaker at the utility
power source. This will protect the sag generator and
DUT from short circuits and overcurrent conditions.
7.3.3 Every effort should be made to protect the DUT.
As with other equipment tests damage to the DUT is
possible. Although only a remote possibility, the
equipment owner should be made aware of the potential
for damage.
8 Sampling and Test Specim ens
8.1 Characterization tests are conducted on samples of
production articles, not on each item produced.
Characterization tests apply to equipment that is
manufactured to a single design either in multiple
quantities or one-of-a-kind. The equipment selected for
testing should reflect current production models of the
supplier.
8.2 The intent of this document is to make reasonable
efforts to test the semiconductor process, metrology,
and automated test equipment as a complete operating
system under the actual intended conditions of end use.
To simulate the worst-case condition, the tests
described in this document should be performed during
the most sensitive process mode of the equipment as
determined by the equipment supplier.
9 Test Setup
9.1 The test setup should consist of a sag generator
and a data acquisition system as shown in Figure 1.
9.2 When the current required by the DUT is within
the sag generator’s rating, the sag generator shall be
connected between the incoming utility power source
and the point of connection (POC) on the DUT. If the
current required by the DUT is greater than the rating of
the sag generator, then individual subsystems of the
DUT can be tested separately.
9.2.1 If DUT subsystem testing is required due to the
limitation of the sag generator, each subsystem must be
tested independently with the other parts of the DUT
operating. Tested in this manner, any interlocks or
alarms that might activate during the test will be
apparent. Testing the DUT main power module may
require providing power to only the main power
module, leaving the subsystems turned off. After the
characteristics of the DUT main power module EMO
circuit are known, testing of DUT subsystems can begin
as described.
9.2.2 Power down the DUT.
Sag
Generator
Device
Under Test
(DUT)
Data
Acquisition
System
(DAS)
N
ominal
Voltage
Test
Voltage
Equipment and
Sub-component
Measurements
POC
Utility Power
Source Branch
Circuit Breaker
NOTE: Single-phase test fixture is shown for clarity.
Figure 1
Test Setup
SEMI F42-0600 © SEMI 1999, 2000 4
9.2.3 De-energize and lockout/tagout the DUT POC.
9.2.4 De-energize and lockout/tagout the voltage
supply at the DUT utility power source branch circuit
breaker.
9.2.5 Identify the utility power source branch circuit
breaker to be used to power the sag generator, then, turn
off and lockout/tagout this device.
9.2.6 Following the sag generator manufacturer’s
instructions, connect the input of the sag generator for
each phase, ground, and neutral (if required) to the
utility power source branch circuit breaker identified in
Section 9.2.5.
9.2.7 Following the sag generator manufacturer’s
instructions, connect the output of the sag generator to
the DUT POC.
9.2.8 Following the DAS manufacturer’s instructions,
connect the DAS channels to the appropriate
measurement points on the DUT. The data acquisition
measurement points should be defined in the test plan
(see Section 10.1.4). Typical data acquisition measure-
ment points for semiconductor equipment are listed in
Table 3.
Table 3 Typical Data Acquisition Measurement
Points
No Data Acquisition Measurement Points
1 Ia, phase A current
2 Ib, phase B current
3 Ic, phase C current
4 Va-n, phase a-n voltage
5 Vb-n, phase b-n voltage
6 Vc-n, phase c-n voltage
7 Instrument Power Supplies output voltage
8 Emergency Off Relay contact
9 Equipment power contactor contact
10 Equipment controller power supplies output
voltage
9.2.9 During all voltage sag tests, the output of the sag
generator must be monitored by the DAS system. The
magnitude of the DAS monitored sag waveform must
be used to determine the magnitude of the actual event
since the magnitude may vary from the pre-sag setting
on the test equipment.
9.2.10 Visually inspect all connections.
9.2.11 Remove the lockout/tagout at the sag generator
utility power supply branch circuit breaker.
9.2.12 Energize the sag generator’s utility power
source branch circuit.
9.2.13 Initialize the sag generator system and set the
output for 100% of the DUT nameplate nominal
voltage.
9.2.14 Using a digital voltmeter, measure and record
the phase voltage(s) at the output of the sag generator.
9.2.15 Remove lockout/tagout at the DUT POC.
9.2.16 Energize the DUT.
9.2.17 Bring the DUT on-line in an idle state.
9.2.18 Using a digital voltmeter, measure and record
the phase voltage(s) at the output of the sag generator.
If needed, adjust the output of the sag generator for
100% of the DUT nameplate nominal voltage.
9.2.19 Set the sag generator for a 95% of DUT
nominal, 10 cycle (200/167 ms) sag voltage on one
phase.
9.2.20 From the sag generator controller, trigger the
sag event.
9.2.21 From the DAS, verify that the test sag event is
within the specified tolerance.
9.2.22 From the DAS, verify that all monitoring points
are recording the expected status information.
10 Test Procedure
10.1 In order to arrive at meaningful and comparable
results from voltage sag immunity testing on
semiconductor equipment the following steps should be
followed.
10.1.1 The test engineer should first study and
understand the DUT power flow and safety interlocking
systems of the DUT.
10.1.2 The test engineer should then determine the
purpose of the test (e.g. To characterize the
susceptibility of the DUT to voltage sags within a
defined duration range and to a defined minimum
voltage magnitude).
10.1.2.1 The test engineer should define the duration
range minimum and maximum over which the test
voltage sag should be applied to the DUT (e.g. 0.05
seconds to 1.0 seconds, as described in voltage sag ride-
through specification, etc.).
10.1.2.2 The test engineer should define the voltage
magnitude minimum(s) that should be applied to the
DUT over the test duration range (e.g. 0 volts nominal
for maximum duration, as described in voltage sag ride-
through specification, etc.).
10.1.3 The test engineer should define that testing is
complete for each phase mode when either an
equipment interrupt occurs at the minimum test
SEMI F42-0600 © SEMI 1999, 20005
duration regardless of the voltage magnitude, or, the
test is conducted at the defined minimum voltage
magnitude without equipment interrupt.
10.1.4 Based on the knowledge gained in the study of
the DUT and the purpose of the test, the test engineer
should prepare a specific Test Plan that references this
test method with date of issue and includes, at a
minimum:
• identify the most sensitive process mode and the
process mode(s) to be used during tests
• minimum sag voltage to be applied (e.g. 0%, 50%,
etc.)
• sag voltage incremental change not greater than 5%
(e.g. 5%)
• maximum sag duration at each sag voltage (e.g.
determined by voltage sag ride-through
specification, potential for DUT damage, etc.)
• sag test durations (e.g. 0.05, 0.2, 0.5, 1.0 seconds)
• phase modes required (e.g. phase-to-neutral, phase-
to-phase)
• point-on-wave of the sags (location on the sine
wave where voltage sag begins): if controllable,
set at 0°. If not controllable, noted as such.
• data acquisition measurement points (e.g. Table 3).
10.2 The following test procedure should be
conducted in both the DUT idle state and the DUT’s
most sensitive process mode (see Section 8.2).
10.3 The following test procedure should be
conducted with the sags applied in each phase mode
identified in the Test Plan (see Section 10.1.4).
10.3.1 For single-phase loads, the sags should be
applied from phase-to-neutral, for a total of one mode.
10.3.2 For three-phase loads without a neutral con-
ductor, the sags should be applied from phase-to-phase
between each pair of phases, for a total of three modes.
10.3.3 For three-phase loads with a neutral conductor,
the sags should be applied from phase-to-neutral for
each phase, and from phase-to-phase between each pair
of phases, for a total of six modes.
10.4 Using a DVM, measure and record the actual test
site voltages at the line side of the sag generator, phase-
to-neutral (if available) and phase-to-phase (if
available).
10.5 Verify that the test setup is complete (see Section
9).
10.6 Set the sag generator to 100% of the DUT
nameplate nominal voltage. Cycle through the
following test procedure.
10.6.1 Set the sag generator to the next lower sag volt-
age based on the sag voltage increment determined in
the Test Plan, not greater than 5% (see Section 10.1.4).
10.6.2 Set the sag generator to the minimum sag
duration for this sag voltage in the Test Plan (see
Section 10.1.4).
10.6.3 Trigger the sag event. Record the results,
including the magnitude (sag depth) and duration.
NOTE 6: It is advantageous to record additional detail, such
as DAS waveforms, if a DUT interruption occurs.
10.6.4 Set the sag generator to the next longer sag
duration for this sag voltage in the Test Plan (see
Section 10.1.4)
10.6.5 Trigger the sag event. Record the results,
including the magnitude (sag depth) and duration.
10.6.6 Repeat Sections 10.6.4 thru 10.6.5 until all
durations are complete for this sag voltage magnitude
per the Test Plan, then, continue to Section 10.6.7.
10.6.7 Repeat Sections 10.6.1 thru 10.6.6 until all sag
voltage magnitudes are complete for this phase mode
per the Test Plan, then, continue to Section 10.6.8.
10.6.8 If required, reconfigure the test setup for the
next phase mode and repeat Sections 10.6.1 thru 10.6.7
until the test is complete for all phase modes, then,
continue to Section 10.6.9.
10.6.9 If required, return the test setup to the original
phase mode and repeat Sections 10.6.1 thru 10.6.8 until
the test is complete for all process modes (e.g. idle
state, most sensitive process mode).
11 Interpretation of Test Res ults
11.1 The injection of voltage sags into semiconductor
equipment can lead to numerous shutdown mechan-
isms. Typical semiconductor equipment voltage sag
shutdown mechanisms include EMO circuitry, instru-
ment and controller power supplies, motion control
drives, and voltage monitoring relays.
11.2 The shutdown or dropout of equipment
components is best identified when monitored by a
DAS that is tightly coupled to the control of the sag
generator. Figures 2 and 3 display the shutdown of a
power supply during a 55% of nominal 10-cycle
(200/167 ms) voltage sag.
11.3 Figure 2 displays the actual voltage sag output
from the sag generator and Figure 3 displays the output
of the power supply. With the DAS it can be seen that