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SEMI F47-0200 © SEMI 199 9, 2000 2 other rela ted stan dards. 3.4 This standard is intended to be a p erformance specification, it is not in tended to address design iss ues related to s afety which are covered elsewhere…

SEMI F47-0200 © SEMI 1999, 20001

SEMI F47-0200

SPECIFICATION FOR SEMICONDUCTOR PROCESSING EQUIPMENT

VOLTAGE SAG IMMUNITY

This specification was technically approved by the Global Facilities Committee and is the direct

responsibility of the North American Facilities Committee. Current edition approved by the North American

Regional Standards Committee on December 15, 1999. Initially available on www.semi.org January 2000; to

be published February 2000. Originally published September 1999.

1 Purpose

1.1 Semiconductor factories require high levels of

power quality due to the sensitivity of equipment and

process controls. Semiconductor processing equipment

is especially vulnerable to voltage sags. This document

defines the voltage sag ride-through capability required

for semiconductor processing, metrology, and

automated test equipment.

1.2 The requirements in this international standard

were developed to satisfy semiconductor industry

needs. While more stringent than existing generic

standards, this industry-specific specification is not in

conflict with known generic equipment regulations

from other regions or generic equipment standards from

other organizations (see Related Information section).

1.3 It is the intent of this standard to provide

specifications for semiconductor processing equipment

that will lead to improved selection criteria for sub-

components and improvements in equipment systems

design. While it is recognized that in certain extreme

cases or for specific functions battery storage devices

may be appropriate, it is not the intent of this standard

to increase the size or use of battery storage devices

provided with equipment. Focus on improvements in

equipment component and system design should lead to

a reduction or elimination in the use of battery storage

devices to achieve equipment reliability during voltage

sag events.

2 Scope

2.1 This document specifies the minimum voltage sag

ride-through capability design requirements for

equipment used in the semiconductor industry. The

expected equipment performance capability is shown

graphically on a chart representing voltage sag duration

and percent deviation of equipment nominal voltage.

Standard evaluation test method references are also

included.

2.2 The primary focus for this specification is

semiconductor processing equipment including but not

limited to the following tool types:

• Etch equipment (Dry & Wet),

• Film deposition equipment (CVD & PVD),

• Thermal equipment,

• Surface prep and clean,

• Photolithography equipment (Stepper & Tracks),

• Chemical Mechanical Polishing equipment,

• Ion Implant equipment,

• Metrology equipment, and

• Automated test equipment.

2.3 This specification applies to se miconductor

processing equipment to include the equipment

mainframe and all subsystems whose electrical power is

directly affected by the operation of the equipment’s

EMO system.

2.4 This standard does not purport to address safety

issues, if any, associated with its use. It is the

responsibility of the users of this standard to establish

appropriate safety and health practices and determine

the applicability of regulatory limitations prior to use.

3 Limitations

3.1 Not included in this standard are over voltage

conditions, voltage sag duration of less than 0.05

seconds (50 milliseconds), and voltage sag duration of

greater than 1.0 seconds. If necessary, the Information

Technology Industry Council (ITIC) “CBEMA-curve”

contained in IEEE 446, IEEE 1100, and SEMI E51 can

be used to specify additional requirements outside the

range of this document (see Related Information,

Section R1-1).

3.2 This specification does not address wafer quality

with regard to processing variation caused by voltage

sags. It is recommended that each equipment supplier

consider the effects of voltage sags on their equipment

processes. If voltage sags above the defined line can

result in known wafer quality problems, then an appro-

priate notification-only scheme should be considered in

the equipment design. To be in conformance with this

standard that notification scheme should not be

classified as an equipment interrupt per SEMI E10.

3.3 This standard addresses specifications for

semiconductor processing equipment voltage sag

immunity. Factory systems voltage sag immunity and

electric utility voltage sag performance are covered in

SEMI F47-0200 © SEMI 1999, 2000 2

other related standards.

3.4 This standard is intended to be a performance

specification, it is not intended to address design issues

related to safety which are covered elsewhere in the

SEMI Standards (see SEMI S2).

NOTE 1: Safety related systems may require ride-through

capability for conditions up to and including full power

failure. Further, if hazards could result from voltage sags

greater than those allowable in Table 1, provisions should be

made to negate or eliminate such hazards.

3.5 International, national and local codes, regulations

and laws should be consulted to ensure that the equip-

ment meets regulatory requirements in each location.

4 Referenced Standards

4.1 SEMI Standards

SEMI E10 — Standard for Definition and Measurement

of Equipment Reliability, Availability, and

Maintainability (RAM)

SEMI E51 — Guide for Typical Facilities Services and

Termination Matrix

SEMI F42 — Test Method for Semiconductor

Processing Equipment Voltage Sag Immunity

SEMI S2 — Environmental, Health, and Safety

Guideline for Semiconductor Manufacturing Equipment

4.2 IEEE Standards

IEEE 446 — IEEE Recommended Practice for

Emergency and Standby Power Systems for Industrial

and Commercial Applications (IEEE Orange Book)

IEEE 1100 — IEEE Recommended Practice for

Powering and Grounding Sensitive Electronic

Equipment (IEEE Emerald Book)

IEEE 1250 — IEEE Guide for Service to Equipment

Sensitive to Momentary Voltage Disturbances

NOTE 2: As listed or revised, all documents cited shall be the

latest publications of adopted standards.

5 Terminology

5.1 assist — an unplanned interruption that occurs

during an equipment cycle where all three of the

following conditions apply:

• The interrupted equipment cycle is resumed

through external intervention (e.g., by an operator

or user, either human or host computer).

• There is no replacement of a part, other than

specified consumables.

1 The Institute of Electrical and Electronic Engineers, Inc., 345 East

47th Street, New York, NY 10017-2394, USA

• There is no further variation from specification of

equipment operation [SEMI E10].

5.2 failure — any unplanned interruption or variance

from the specifications of equipment operation other

than assists [SEMI E10].

5.3 interrupt — any assist or failure [SEMI E10].

5.4 ride-through capability — the ability of equipment

to withstand momentary interruptions or sags [IEEE

1250]. Also known as voltage sag immunity.

5.5 voltage sag — an rms reduction in the ac voltage

at power frequency for durations from half-cycle to a

few seconds [IEEE 1250]. Also known as voltage dip.

6 Ordering Information

6.1 Semiconductor manufacturers may use this

standard when procuring processing equipment to

specify equipment ride-through requirements capability

to the equipment supplier. This document may also be

used by semiconductor processing equipment suppliers

to specify ride-through requirements to component and

module suppliers.

6.2 Orders for equipment in accordance with this

standard shall include:

a) This specification number and date of issue.

b) Requirements for qualification testing per SEMI

F42.

c) Any certification showing passage of qualification

tests required to be provided (optional).

d) Any test results required to be included in reports

to be provided (optional).

7 Requirements

7.1 Semiconductor processing, metrology, and

automated test equipment must be designed and built to

conform to the voltage sag ride-through capability

shown in Figure 1. Equipment must continue to operate

without interrupt (see Terminology) during conditions

identified in the area above the defined line.

7.2 The requirements defined in this specification

apply to two phase (phase-to-phase) and single phase

(phase-to-neutral) voltage incidents.

7.3 The performance curve is defi ned by values shown

in Table 1—voltage sag duration and percent deviation

from equipment nominal voltage.

NOTE 3: For recommendations on equipment ride-through

capability below 0.05 seconds (50 milliseconds) and above

1.0 seconds, see Related Information at the end of this

document.

8 Test Methods

8.1 Qualification tests are conducted on samples of

production articles, not each item produced.

Qualification testing of equipment to requirements in

this specification should be performed per SEMI F42.

9 Related Documents

9.1 SEMI Standard

SEMI S9 — Electrical Test Methods for Semiconductor

Manufacturing Equipment

9.2 CENELEC Standard

EN 50082-2 — Electromagnetic Compatibility —

Generic Immunity Standard, Part 2: Industrial

Environments

9.3 IEC Standard

IEC 61000-4-11 — Electromagnetic Compatibility

(EMC) — Part 4: Testing and Measuring Techniques

— Section 11: Voltage Dips, Short Interruptions and

Voltage Variations Immunity Tests

9.4 IEEE Standard

IEEE 1346 — Electric Power System Compatibility

with Electronic Process Equipment

NOTE 4: As listed or revised, all documents cited shall be the

latest publications of adopted standards.

2 European Committee for Electrotechnical Standardization, Rue de

Stassart, 35, B – 1050, Brussels

3 International Electrotechnical Commission, 3, rue de Varembé, P.O.

Box 131, 1211 Geneva 20, Switzerland