semi合集-English.pdf - 第5346页
SEMI M52-0703 © SEMI 2002, 2003 10 Item Recommended Specification Comments References 1.3.4 Layers ( LTO, poly-Si), Epi LTO: thickness: 150–900 nm uniformity: ≤ 10% Poly-si: thickness: ≤ 2 µ m, uniformity: <20 % Epita…
SEMI M52-0703 © SEMI 2002, 2003 9
Item Recommended Specification Comment References
5.16 ARAMS (Automated Reliability,
Availability, and Maintainability
Standard)
required SEMI E58
Table 2 Materials to be measured
Item Recommended Specification Comments References
1. WAFERS
1.1 Kind of Wafers
monocrystalline, unpatterned silicon
wafers with layers as specified in
Table 2, 1.3.4
SEMI M1
(SEMI M8)
(SEMI M11)
(SEMI M24)
1.2 Wafer Characteristics - dimensional
1.2.1 Wafer Diameter
200 or 300 or 200 and 300 mm nominal SEMI M1
ASTM F 2074
DIN 50441-4
1.2.2 Wafer Thickness
700–850 µm For reclaim wafers,
performance as
outlined in Table 3
might be reduced.
200 mm: 600–850 µm
300 mm: 650–850 µm
ASTM F 1530
DIN 50441-1
1.2.3 Edge Shape
rounded SEMI M1
DIN 50441-2
ASTM F 928
1.2.4 Wafer Shape Range
200 mm wfrs: warp ≤100 µm,
300 mm wfrs: warp ≤200 µm
SEMI M1
ASTM F 1390
DIN 50441-5
1.2.5 Fiducial
flat or notch SEMI M1
ASTM F 671
ASTM F 1152
(DIN 50441-4)
1.2.6 ID Mark(s)
200 mm wfrs: user specific
300 mm wfrs: according to SEMI
standards
content, type location
of ID mark to be
specified
SEMI M12
SEMI M13
SEMI M1.15
SEMI T7
1.3 Wafer Characteristics - electrical,
optical
1.3.1 Electrical resistivity of wafers,
conductivity type
0.5 mΩ·cm – intrinsic, p-, n-type
Res: ASTM F 673
DIN 50445
ASTM F 84
DIN 50431
Type: ASTM F 42 or
DIN50432
1.3.2 Thermal donors
annealed and not annealed
1.3.3 Wafer charge
no effect with respect to measurement
SEMI M52-0703 © SEMI 2002, 2003 10
Item Recommended Specification Comments References
1.3.4 Layers (LTO, poly-Si), Epi
LTO: thickness: 150–900 nm
uniformity: ≤10%
Poly-si: thickness: ≤2 µm, uniformity:
<20 %
Epitaxial layer: customer specific
1.3.5 Wafer surface conditions
front side: polished, annealed, epitaxial
layer
backside: polished, acid and/or caustic
etched, layers according to 1.3.4
Annealing may affect
the surface roughness
of a Si wafer.
Evaluation of capture
rate with such a wafer
may not achieve the
specifications as
defined in Section 2.2
and Table 3, 1.2.1.
Table 3 Metrology Specific Equipment Characteristics
Item Recommended Specification Comments References
1. MEASUREMENT FUNCTIONS
1.1 Defect type
1.1.1 PSL sphere
required For reference SEMI M35
1.1.2 Particle
required SEMI M1
SEMI M35
1.1.3 COP
required
SEMATECH
TT 95082941A-TR
1.1.4 Mound (epi)
required ASTM F 1241
1.1.5 Mound (pw)
required
1.1.6 Pit
required
SEMI M35
SEMATECH
TT 95082941A-TR
1.1.7 Spike (epi)
required ASTM F 154
1.1.8 Stacking Fault (epi)
required ASTM F 154
1.1.9 Scratch
required
SEMI M35
SEMATECH
TT 95082941A TR
1.1.10 Slip
required ASTM F 1241
1.1.11 Dimple
required SEMI M1
1.1.12 Haze
required SEMI M1, M35
1.1.13 Slurry Ring
required
1.1.14 Stain
required ASTM F 1241
SEMI M52-0703 © SEMI 2002, 2003 11
Item Recommended Specification Comments References
1.1.15 Other defects
not required Protrusion, Flake,
Chuck Mark, Misfit,
Twin, Tweezer, Edge
Chip, Edge
Chip(peripheral), Edge
Crack, Edge Crown,
Nodule, Dopant
striation,
Gloss(specular),
Growth Ring,
Microroughness,
Orange Peel, Polishing
line, Saw Mark
1.2 System Performance for PSL
Spheres
1.2.1 Capture Rate
≥95%, 65 nm LSE and higher Wafer surface quality
must meet ITRS
requirements for 130
nm node.
SEMI M50
1.2.2 Sizing Dimension
65–2000 nm Dynamic Range
1.2.3 Count Level 3 Variability σ
3
<2.3%, 1 σ
>50, <150 LLS
count/wafer required
1.2.4 Count Matching Tolerance ∆
m
<2.6%
>50, <150 LLS
count/wafer required
1.2.5 Sizing error from interpolation
≤2% of mean diameter
65–200 nm LSE
see NOTE 1
1.2.6 Sizing Level 3 Variability σ
3
<2.3%, 1σ
65–200 nm LSE
1.2.7 Sizing Matching Tolerance
<2.3% 65–200 nm LSE
1.3 Threshold values for various defects
1.3.1 COP/Particle Classification
1.3.1.1 Classification Accuracy
≥90% For ≥80 nm LSE
1.3.1.2 Classification purity
≥95% For ≥80 nm LSE
1.4 Haze
SEMI M1
1.4.1 Level 3 Variability σ
3
<2%, 1σ
For polished and epi
wafers, average haze
1.4.2 Matching Tolerance ∆
m
<2.6% For polished and epi
wafers, average haze
1.5 Defect Coordinate, Inscribed
Reference
1.5.1 Bias
±20 µm
At minimum pitch
1.5.2 Level 3 Variability σ
3
10 µm, 1σ
At minimum pitch
1.5.3 Matching Tolerance ∆
m
13 µm At minimum pitch
1.6 Inspection Surface
1.6.1 Front side
User specific/selectable
1.6.2 Backside
User specific/selectable