MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第129页

MIL-STD-883F METHOD 1020.1 15 November 1991 1 METHOD 1020.1 DOSE RATE INDUCED LATCHUP TEST PROCEDURE 1. PURPOSE . This test procedur e defines the detai led requir ements f or perf orming l atchup t esti ng of mic roci r…

MIL-STD-883F

METHOD 1019.6

7 March 2003

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MIL-STD-883F

METHOD 1020.1

15 November 1991

METHOD 1020.1

DOSE RATE INDUCED LATCHUP TEST PROCEDURE

1. PURPOSE

. This test procedure defines the detailed requirements for performing latchup testing of microcircuits to

identify susceptibility to dose rate induced latchup.

1.1 Definitions

. Definitions of terms used in this procedure are provided below:

a. Dose rate induced latchup. Dose rate induced latchup is regenerative device action in which a parasitic region

(e.g., a four layer p-n-p-n or n-p-n-p path) is turned on by a photocurrent generated by a pulse of ionizing

radiation, and remains on for an indefinite period of time after the photocurrent subsides. The device will remain

latched as long as the power supply delivers voltage greater than the holding voltage and current greater than the

holding current. Latchup disrupts normal circuit operation in some portion of the circuit, and may also cause

catastrophic failure due to local heating of semiconductor regions, metallization or bond wires.

b. Latchup windows. A latchup window is the phenomenon in which a device exhibits latchup in a specific range of

dose rates. Above and below this range, the device does not latchup. A device may exhibit more than one

latchup window. This phenomenon has been observed for some CMOS logic devices, oxide sidewall logic and

LSI memories, and may occur in other devices.

c. Combinational logic. Combinational (determined) logic devices are those whose output is solely determined by

the logic signals at its inputs (except for switching delays). Combinational logic circuits contain no internal storage

elements, and include multiplexers, decoders, and gates.

d. Sequential logic. Sequential (nondetermined) devices are those in which the output state at any given time

depends on the sequence and time relationship of logic signals that were previously applied to its inputs.

Sequential logic circuits contain internal storage elements. Examples of sequential logic devices are shift

registers, memories, counters, and flip-flops.

e. Recovery period. The recovery period is the time interval in which the device supply current recovers from the

radiation pulse.

f. Holding voltage and holding current: The voltage and current above which latchup is sustained.

1.2 Test plan

. Prior to latchup testing, a latchup test plan shall be prepared which describes the radiation source, the

dosimetry techniques, test equipment and conditions to be used. A detailed procedure for each device type to be tested

shall be prepared, either as part of the test plan or in separate test procedure documents. The procedure shall include bias

conditions, test sequence, and schematics of the test setup. The test plan shall be approved by the acquiring activity, and

as a minimum, the items listed below shall be provided in the test plan or test procedure:

a. Device types, including package types, and quantities to be tested.

b. Traceability requirements, such as requirements for serialization, wafer or lot traceability, etc.

c. Requirements for data reporting and submission.

d. Temperature for test (see 2.3.6).

e. Block diagram or schematic representation of test set up.

f. Electrical parameters to be monitored and device operating conditions, including bias conditions and functional

test requirements before, during, and after the radiation pulse.

g. Group A electrical test requirements for pre- and post-latchup testing, to include test limits and failure criteria.

MIL-STD-883F

METHOD 1020.1

15 November 1991

h. Radiation pulse width(s), radiation dose(s) per pulse and dose rate range(s).

i. Total dose limit for each device type.

j. Failure criteria.

In addition to those items listed above, the test plan or procedure for production tests shall include the following:

k. Method(s) to detect latchup, e.g., monitoring of the supply current, functional testing (to include test vector set,

etc.).

l. Recovery period and when to begin post-irradiation in-situ tests. The recovery period for SSI devices is typically

50 to 300 µs; however, other device types may require a longer recovery period, or there may be special program

requirements which call for earlier recovery.

m. Functional test requirements. The functional tests shall demonstrate that the device responds properly to input

commands and that the device is operating properly. Note that high speed functional tests may be incompatible

with the long leads and unavoidable capacitance associated with most latchup test systems.

n. Exposure states or operating conditions. For digital devices, a specific state and its complement are usually used.

However, for more complex devices, more than two exposure states may be required, and the specific states

shall be as determined by the characterization testing (and analysis, if required) and specified in the test plan or

procedure.

o. Bias and load conditions. Unless otherwise specified, the maximum rated operating supply voltage shall be used.

p. Outputs to be monitored.

q. The minimum dc current that must be available from the power supply, or the value of series current limiting

resistor that has been approved by the acquiring activity. (Note that any current limiting resistor shall be less than

or equal to that in the system application and shall be approved by the acquiring activity prior to latchup testing.)

2. APPARATUS

. The apparatus shall consist of the radiation source, the dosimetry system, and the latchup test system

which includes the device interface fixture, the test circuit, cabling, timing, and temperature control systems. Precautions

shall be observed to obtain adequate electrical grounding to ensure low noise.

2.1 Radiation source

. Either of two radiation sources shall be used for latchup testing: 1) a flash x-ray machine (FXR),

or 2) an electron linear accelerator (LINAC). The FXR shall be used in the x-ray mode and the LINAC in the electron (e-

beam) mode. The FXR peak (endpoint) energy shall be 2 MeV or greater, and the LINAC beam energy shall be 10 MeV or

greater. The pulse width shall be from 20 to 100 ns, or as specified in the acquisition document, and the uniformity of the

radiation field in the device irradiation volume shall be ±15 percent as measured by the dosimetry system. The dose per

radiation exposure shall be as specified in the test plan or procedure. (See 3.5.1 for production test requirements.)

2.2 Dosimetry system

. A dosimetry system shall be used which provides a measurement accuracy within ±15 percent. A

calibrated PIN diode may be used to obtain both the shape of the radiation pulse and the dose, and the following DOD

adopted American Society for Testing and Materials (ASTM) standards or their equivalent may be used:

ASTM E 666 - Standard Method for Calculation of Absorbed Dose from Gamma or X Radiation.

ASTM E 668 - Standard Practice for the Application of Thermoluminescence Dosimetry (TLD) Systems

for Determining Absorbed Dose in Radiation Hardness Testing of Electronic Devices.

ASTM E 1249 - Minimizing Dosimetry Errors in Radiation Hardness Testing of Silicon Electronic

Devices.