MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第132页

MIL-STD-883F METHOD 1020.1 15 November 1991 4 2.3.4 Moni toring and r ecordi ng equipment . Equipment to monitor and recor d the paramet ers r equired i n the tes t plan or procedur e shall be integr ated int o the latc …

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MIL-STD-883F
METHOD 1020.1
15 November 1991
3
2.3 Latchup test system
. A block diagram of a typical latchup test system is presented on figure 1020-1. The
instrumentation shall be capable of establishing the required test conditions and measuring and recording the required
parameters. The test system shall be designed to maintain the instantaneous bias supply voltage within the limits specified
in 2.3.2 below for both transient and dc conditions, including a latchup condition. The test system shall not limit the ac or dc
bias supply current to values that prevent latchup from occurring or being detected. Components other than the device
under test (DUT) shall be insensitive to the expected radiation levels, or they shall be shielded from the radiation. The
system used for latchup testing shall contain the following elements:
2.3.1 Device interface fixture
. The DUT shall be interfaced to the test circuitry with a fixture having good high frequency
characteristics, and providing a low inductance connection to the power supply and bypass capacitor.
2.3.2 Bias and functional test circuit
. The test circuit for each device type shall provide worst case bias and load
conditions for the DUT, and shall perform in-situ functional testing of the DUT as specified in the test plan or procedure.
Line drivers shall be used, when necessary, to isolate the DUT from significant extraneous loading by the cabling. The
characteristics of the line drivers (e.g., linearity, dynamic range, input capacitance, transient response, and radiation
response) shall be such that they do not reduce the accuracy of the test. The power supply shall have low source
impedance and meet the following requirements:
a. The power supply voltage shall drop no more than 20 percent at the DUT during the rise time of the DUT during
the rise time of the DUT supply current, and no more than 10 percent thereafter. These requirements can be
achieved by selecting appropriate capacitance values and minimizing lead lengths of the stiffening capacitors. A
high frequency, radiation resistant capacitor shall be placed at the DUT for each bias supply voltage, and larger
capacitors may be placed a short distance from the fixture shielded from the radiation.
b. DC power supplies shall provide sufficient current for device operation and to maintain holding current if latchup
occurs.
c. Power supplies connected in series with digital ammeters (current probes or current sensors) may be used only if
the ammeter is physically located on the power supply side of the bypass capacitor. The ammeter should be
selected to minimize the series dc voltage drop at the maximum expected load current. If necessary, the power
supply voltage should be adjusted upwards slightly to ensure that the voltage measured at the DUT is within the
specified limits for the test conditions.
d. Current limiting resistors shall not be used in series with the supply voltage unless approved by the acquiring
activity prior to latchup testing, and the value of the resistance is less than or equal to that in the system
application.
CAUTION: Current limiting resistors can produce a relatively narrow latchup window which may reside entirely
outside the standard testing range of 500 ±200 rads(Si). If current limiting is used, especially when used as a
means of latchup prevention, characterization tests shall be performed to determine the dose rate appropriate for
production testing.
If current limiting resistors are used, they shall be placed sufficiently close to the DUT to ensure that the voltage
drop at the DUT during the transient photocurrent rise time is governed by the resistance and not the inductance
from the leads (i.e., voltage drop is approximately IR and not L di/dt). The requirements of paragraphs a-c apply
with the reference point being the power supply side of the current limiting resistor, instead of the DUT supply
pin(s). For applications using small value bypass capacitors directly at the power supply pin(s), the same, or
larger, value of capacitance must be used in the test circuit when current limiting resistors are used. As noted
above, leads shall be kept to the minimum practical lengths.
2.3.3 Cabling
. Cabling shall be provided to connect the test circuit board to the test instrumentation. All cables shall be
as short as possible. Coaxial cables, terminated in their characteristic impedance, should be used if high speed functional
testing is to be performed and line drivers are used to isolate the monitoring equipment.
MIL-STD-883F
METHOD 1020.1
15 November 1991
4
2.3.4 Monitoring and recording equipment
. Equipment to monitor and record the parameters required in the test plan or
procedure shall be integrated into the latchup test system. Oscilloscopes and transient digitizers may be used to monitor
the transient response of the device. Additionally, the dose records from each pulse shall be correlated to the specific
device(s) irradiated by that pulse.
2.3.5 Timing control
. An adjustable timing control system shall be incorporated into the latchup test system such that
post-irradiation in-situ functional testing is performed at the specified time, typically 50 µs to 300 µs, after the radiation pulse.
Longer time periods, as long as several minutes, may be required to complete the functional tests for complex devices.
2.3.6 Temperature control
. When testing at other than room temperature, a temperature control system shall control the
temperature of the DUT to ±10°C of the specified temperature. Unless otherwise specified, latchup testing shall be
performed at the highest device operating temperature in the system application or 15°C below the maximum rated
temperature of the device, whichever is less. (See cautionary note below.) If an application temperature is not known, or is
not available, the device shall be tested at 15°C below the maximum rated temperature. Heat sinking may be required to
ensure that the device is not operated above the maximum rated temperature.
CAUTION: The thermal conduction through the latchup test sockets is often much less than that through the pins in
soldered boards.
3. PROCEDURE
.
3.1 Device identification
. In all cases, devices shall be serialized, and the applicable recorded test data shall be traceable
to the individual device.
3.2 Radiation safety
. All personnel shall adhere to the health and safety requirements established by the local radiation
safety officer or health physicist.
3.3 Total dose limit
. Unless otherwise specified, any device exposed to more than 10 percent of its total dose limit shall
be considered to have been destructively tested. The total dose limit shall be determined for each device type to be tested,
and shall be specified in the test plan.
3.4 Characterization testing and analysis
. Characterization tests should be performed on new or unfamiliar device types
to determine their performance as a function of dose rate and to establish requirements for production testing. Because
latchup is dependent on lot to lot variations, samples for characterization tests should be pulled from the production lot(s).
The following are examples of information gained from characterization testing:
a. Latchup threshold as a function of radiation dose, dose rate, and pulse width.
b. Existence and dose rate range of latchup windows. To check for windows, latchup testing is performed over a
wide range of dose rates in fine increments.
c. Worst case or unique conditions that cause the device to exhibit latchup, such as operating voltage, temperature,
and bias conditions.
d. Method(s) to detect latchup, e.g., monitoring supply current, functional testing, or both. Note that in-situ functional
tests must be thorough enough to determine if a small portion of a large circuit has latched without drawing
enough additional current to significantly increase the device supply current.
e. Group A electrical parameter degradation subsequent to latchup testing.
f. Holding current and holding voltage.
MIL-STD-883F
METHOD 1020.1
15 November 1991
5
Before testing LSI/VLSI circuits, an analysis is often required to determine likely latchup paths and requirements for bias
conditions, exposure states, and functional testing. These large circuits often have too many outputs to be monitored
individually, and through the analysis, monitored outputs can be limited to those most apt to show a change should latchup
occur.
3.5 Production testing
. Prior to production testing, characterization testing shall be performed at least once for new or
unfamiliar device types (i.e., new design or process, unfamiliar or very complex devices with little or not latchup test history).
The results of the characterization tests are used to develop the requirements for the production tests (see 3.4). These
requirements are specified in the applicable test plan or procedure and include those items listed in 1.2.
3.5.1 General requirements for production tests
. Unless otherwise specified, the dose per pulse shall be 500 ±200
rad(Si) with a pulse width between 20 and 100 ns, inclusive. Circuits shall be exposed to radiation pulses in at least two
difference states (for digital devices) as specified in the test plan or procedure. Unless otherwise specified, determination of
latchup shall be based on a combination of DUT supply current and output signal (voltage) recovery within the specified time
limits and the results of post-irradiation in-situ functional tests. Power supplied to the DUT shall not be interrupted until after
the post-irradiation in-situ tests are completed. The DUT supply current shall be measured immediately before and at the
specified time after the radiation pulse to determine if the supply current has returned to within specified limits. A functional
test shall be performed immediately after the recovery period to demonstrate that the device functions properly. Unless
otherwise specified, tests shall be performed at the highest device operating temperature in the system application or 15°C
below the maximum rated temperature of the device, whichever is less. Current limiting resistors are allowed only if prior
approval is obtained from the acquiring activity and the value of the resistor is less than or equal to that in the system
application. Unless otherwise specified, endpoint electrical tests (group A, subgroups 1 and 7, as a minimum) shall be
performed pre- and post-latchup testing. These group A tests are generally not performed in-situ, and there is no time limit
on performing the group A tests. If group A testing is performed as part of another test (e.g., post-burn in, final electrical
acceptance), the group A tests need not be duplicated as long as the test sequence is: Group A tests - latchup testing -
group A tests.
3.5.2 Production test sequence
.
CAUTION: Exercise caution when handling devices, particularly with regard to pin alignment in the carriers and holding
fixture and when attaching devices to the test circuit. Insure that bias voltage are off before attachment. Observe ESD
handling procedures for the class of devices being tested.
The latchup test system, including test circuitry, cables, monitoring, and recording equipment, shall be assembled to provide
the specified biasing and output monitoring. Place the DUT in position for the specified dose; ensure that the system is
functioning as follows:
Step 1: Apply and verify the bias voltages at the interface fixture with the device removed.
Step 2: Adjust timing control system to provide the required time interval between radiation pulse and post-
irradiation measurements.
Step 3: Remove bias voltages and install a control sample device (identical to devices to be tested).
Step 4: Turn on bias voltages and verify proper device function in accordance with performance requirements.
Step 5: Verify proper operation of all recording, monitoring, and timing control equipment.
Step 6: Remove bias voltages and control device, in that order.