MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第173页

MIL-STD-883F METHOD 1033 29 May 1977 1 METHOD 1033 ENDURANCE LIFE 1. PURPOSE . Enduranc e lif e is per formed i n order t o demonstr ate the qual ity and rel iabil ity of nonvolatil e memory devices subjec ted to repeat …

MIL-STD-883F

METHOD 1032.1

29 May 1987

4. SUMMARY

. The following details shall be specified.

a. Device type and quantity to be tested.

b. Test circuit to be used.

c. Device output pins to be monitored.

d. Alpha source used if other than specified herein.

e. Alpha source Curie level.

f. Package flux measurement techniques.

g. Test equipment to be used.

h. Procedures for proper handling of radioactive materials.

MIL-STD-883F

METHOD 1033

29 May 1977

METHOD 1033

ENDURANCE LIFE

1. PURPOSE

. Endurance life is performed in order to demonstrate the quality and reliability of nonvolatile memory

devices subjected to repeated write/erase cycles. This method may also be used in a screening sequence or as a

preconditioning treatment prior to conducting other tests. It may be desirable to make end point, and where applicable,

intermediate measurements on a serialized device basis or on the basis of a histogram distribution by total sample in order

to increase the sensitivity of the test to parameter degradation or the progression of specific failure mechanism with cycles,

time, or temperature.

1.1 Terms and definitions

1.1.1 Endurance

. The number of write/erase cycles a device can tolerate before failing to perform to specification.

1.1.2 Write/erase cycle

. The act of changing the data from original to opposite to original in all bits of a memory device.

This may be done for all bits in parallel or serial, e.g., block, byte, or bit.

1.1.3 Data retention screen

. The unbiased baking at high temperature to accelerate the loss of charge from the storage

node.

2. APPARATUS

. The apparatus required for this test shall consist of equipment capable of write/erase cycling the

devices, a controlled temperature chamber for performing a data retention bake, and suitable electrical test equipment to

make the specified interim and end point measurements.

3. PROCEDURE

. The devices shall be write/erase cycled (all bits) for specified maximum number of cycles, followed by

electrical test, the specified data retention bake and electrical test. Interim pull points shall use the same sequence of cycle,

electrical test, data retention bake, and electrical test.

3.1 Test condition

. The case temperature, cycle time, data retention bake, and electrical test temperatures and

conditions will be specified in the applicable device specification or drawing (see 4).

3.2 Failure criteria

. No device is acceptable that exhibits:

a. Inability to write or erase across the temperature range.

b. Inability to retain data.

c. Inability to read at specified timing conditions, across the temperature and supply voltage range.

d. Inability to be write/erase cycled a minimum number of times n.

MIL-STD-883F

METHOD 1033

29 May 1977

4. SUMMARY

. The following details shall be specified in the applicable acquisition document:

a. Number of write/erase cycles, n.

b. Data retention bake conditions, including duration and temperature.

c. Electrical test case temperature and timing conditions.

d. Requirements for preconditioning, if applicable, and procedure if different than in 3.

e. Cycle conditions including temperature, type (e.g., block, byte, or bit) and write/erase pulse duration and repetition

rate.

f. The sample plan including number of devices to be cycled and acceptance number.

g. End-point and interim electrical test criteria.