MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第482页

MIL-STD-883F METHOD 3002.1 15 November 1974 2 This page i ntenti onally lef t blank

MIL-STD-883F

METHOD 3002.1

15 November 1974

METHOD 3002.1

LOAD CONDITIONS

1. PURPOSE

. This method establishes the load conditions to be used in measuring the static and dynamic performance

of digital microelectronic devices such as TTL, DTL, RTL, ECL, and MOS.

2. APPARATUS

. The load for static tests shall simulate the worst case conditions for the circuit parameters being tested.

The load for dynamic tests shall simulate a specified use condition for the parameters being tested. The loads shall be

specified in the applicable acquisition document.

2.1 Discrete component load

. The load will consist of any combination of capacitive, inductive, resistive, or diode

components.

2.1.1 Capacitive load (C

). The total load capacitance of the circuit under test shall include probe and test fixture

capacitance and a compensating capacitor as required. The value of the capacitance, measured at 1 MHz ±10 percent,

shall be specified in the applicable acquisition document.

2.1.2 Inductive load (L

). The total load inductance of the circuit under test shall include probe and test fixture inductance

and a compensating inductor as required. The value of the inductance, measured at 1 MHz ±10 percent, shall be specified

in the applicable acquisition document.

2.1.3 Resistive load (R

). The resistive load shall represent the worst case fan out conditions of the device under test for

static tests and a specified fan out condition for dynamic tests. For sink loads, the resistor shall be connected between the

power supply (V

or V

) and the circuit output for TTL, DTL, RTL, C-MOS, and MOS (N-Channel) and between circuit

output and ground for MOS (P-Channel). For source loads, the resistor shall be connected between circuit output and

ground for TTL, DTL, RTL, C-MOS, and MOS (N-Channel) and between V

and the circuit output for MOS (P-Channel).

For ECL devices, the load resistors are connected from the output to a specified negative voltage.

2.1.4 Diode load (D

). The diode load shall represent the input diode(s) of the circuit under test. The equivalent diode, as

specified in the applicable acquisition document, will also represent the base-emitter or base-collector diode of any transistor

in the circuit path of the normal load.

2.2 Dynamic load change

. The load shall automatically change its electrical parameters as the device under test changes

logic state if this is the normal situation for the particular family of circuits being tested. One method of accomplishing this

dynamic change is to simulate devices or use actual devices from the same logic family equal to the specified load.

3. PROCEDURE

. The load will normally be paralleled by a high impedance voltage detection indicator. The indicator

may be either visual or memory storage.

4. SUMMARY

. The following shall be defined in the applicable acquisition document:

a. Capacitive load (see 2.1.1).

b. Inductive load (see 2.1.2).

c. Resistive load (see 2.1.3).

d. Diode load, the 1NXXX number and any associated critical parameters shall be specified (see 2.1.4).

e. Negative voltage, when using a resistive load for ECL (see 2.1.3).

MIL-STD-883F

METHOD 3002.1

15 November 1974

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MIL-STD-883F

METHOD 3003.1

15 November 1974

METHOD 3003.1

DELAY MEASUREMENTS

1. PURPOSE

. This method established the means for measuring propagation delay of digital microelectronic devices,

such as TTL, DTL, RTL, ECL, and MOS.

1.1 Definitions

. The following definitions for the purpose of this test method shall apply.

1.1.1 Propagation delay time (t

PHL

). The time measured with the specified output changing from the defined HIGH level to

the defined LOW level with respect to the corresponding input transition.

1.1.2 Propagation delay time (t

PLH

). The time measured with the specified output changing from the defined LOW level to

the defined HIGH level with respect to the corresponding input transition.

2. APPARATUS

. Equipment capable of measuring elapsed time between the input signal and output signal at any

percentage point or voltage point between the maximum LOW level and minimum HIGH level shall be provided. The input

shall be supplied by a driving source as described in method 3001 of this standard. It is desirable for this equipment to have

data logging capability so that circuit dynamic performance can be monitored. The test chamber shall be capable of

maintaining the device under test at any specified temperature.

3. PROCEDURE

. The test circuit shall be loaded according to method 3002 of this standard. The driving signal to the

test circuit shall be provided according to method 3001 of this standard. The device shall be stabilized at the specified test

temperature.

3.1 Measurements at a voltage point

. t

PLH

and t

PHL

shall be measured from the threshold voltage point on the driving

signal to the threshold voltage point on the test circuit output signal for both inverting and noninverting logic. These delays

shall be measured at the input and output terminals of the device under test. The device under test shall be conditioned

according to the applicable acquisition document with nominal bias voltages applied. Figures 3003-1 and 3003-2 show

typical delay measurements.

3.2 Measurements at percentage points

. t

PLH

and t

PHL

shall be measured from a specified percentage point on the driving

signal to a specified percentage point on the test circuit output signal for both inverting and noninverting logic. These delays

shall be measured at the input and output terminals of the device under test. The device under test shall be conditioned

according to the applicable acquisition document with nominal bias voltages applied. Figures 3003-1 and 3003-2 show

typical delay measurements.

4. SUMMARY

. The following details shall be specified in the applicable acquisition document:

a. t

PLH

and t

PHL

limits.

b. Parameters of the driving signal: t

THL

, t

TLH

, high Level, low Level, pulse width, repetition rate.

c. Load conditions.

d. Conditioning voltages (static or dynamic).

e. Measurement points (see 3.1 and 3.2).

f. Power supply voltages.

g. Test temperature.