MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第500页

MIL-STD-883F METHOD 3010.1 15 November 1974 2 This page i ntenti onally lef t blank

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MIL-STD-883F
METHOD 3010.1
15 November 1974
1
METHOD 3010.1
INPUT CURRENT, HIGH LEVEL
1. PURPOSE
. This method establishes the means for assuring circuit performance to the limits specified in the
applicable acquisition document in regard to HIGH level input load which may be specified as a maximum value (I
IH
max) or
a minimum value (I
IH
min). This method applies to digital microelectronic devices, such as TTL, DTL, RTL, ECL, and MOS.
2. APPARATUS
. The test chamber shall be capable of maintaining the device under test at any specified temperature.
An instrument shall be provided that has the capability of applying the worst case HIGH voltage to the input terminal of the
test circuit, and worst case levels at the other inputs, and measuring the resultant current at the input terminal.
3. PROCEDURE
. The device shall be stabilized at the specified test temperature. Worst case power supply voltages and
worst case input voltages shall be applied to the test circuit and the resultant current at the input terminal shall be measured.
Inputs shall be tested individually.
4. SUMMARY
. The following details shall be specified in the applicable acquisition document:
a. Test temperature.
b. Power supply voltages.
c. Input voltage.
d. Input voltages at other input terminals which cause worst case current at the input under text.
e. I
IH
max.
MIL-STD-883F
METHOD 3010.1
15 November 1974
2
This page intentionally left blank
MIL-STD-883F
METHOD 3011.1
15 November 1974
1
METHOD 3011.1
OUTPUT SHORT CIRCUIT CURRENT
1. PURPOSE
. This method establishes the means for assuring circuit performance to the limits specified in the
applicable acquisition document in regard to output short circuit current (I
OS
). This method applied to digital microelectronic
devices, such as TTL, DTL, RTL, and MOS.
2. APPARATUS
. A test chamber capable of maintaining the device under test at any specified temperature. An
instrument will be provided that has the capability of forcing a voltage specified in the applicable acquisition document at the
output terminal of the device under test and measuring the resultant current flowing in that terminal. The test instrument
shall also have the capability of applying specified voltage levels to all other inputs.
3. PROCEDURE
. The device shall be stabilized at the specified test temperature. Each output per package shall be
tested individually.
3.1 TTL, DTL, RTL, MOS (P-Channel and N-Channel)
. Inputs of the device under test shall be conditioned in such a way
as to provide a HIGH level at the output for TTL, DTL, RTL, and MOS (N-Channel) and a LOW level at the output for MOS
(P-Channel). The output terminal shall be forced to 0 volt potential and the resultant current flow measured.
3.2 C-MOS I
OSH
. Inputs of the device under test shall be conditioned in such a way as to provide a HIGH level at the
output. The output terminal shall be forced to 0 volt potential and the resultant current flow measured.
3.3 C-MOS I
OSL
. Inputs of the device under test shall be conditioned in such a way as to provide a LOW level at the
output. The output terminal shall be forced to a voltage potential specified in the acquisition document and the resultant
current flow measured.
4. SUMMARY
. The following details shall be specified in the applicable acquisition document:
a. Test temperature.
b. Input conditioning voltages.
c. Power supply voltages.
d. I
OS
max and I
OS
min limits.