MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第583页

MIL-STD-883F METHOD 5003 20 November 1969 1 METHOD 5003 FAILURE ANALYSIS PROCEDURES FOR MICROCIRCUITS 1. PURPOSE . Fail ure analys is is a post mortem examinati on of fai led devic es employing, as r equired, el ectr ica…

MIL-STD-883F

METHOD 5002.1

15 August 1984

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MIL-STD-883F

METHOD 5003

20 November 1969

METHOD 5003

FAILURE ANALYSIS PROCEDURES FOR MICROCIRCUITS

1. PURPOSE

. Failure analysis is a post mortem examination of failed devices employing, as required, electrical

measurements and many of the advanced analytical techniques of physics, metallurgy, and chemistry in order to verify the

reported failure and identify the mode or mechanism of failure as applicable. The failure analysis procedure (as indicated by

test condition letter) shall be sufficient to yield adequate conclusions, for determination of cause or relevancy of failure or for

initiation of corrective action in production processing, device design, test or application to eliminate the cause or prevent

recurrence of the failure mode or mechanism reported.

1.1 Data requirements

. When required by the applicable acquisition document the failure analyst shall receive, with the

failed part, the following information:

a. Test conditions: This shall include the type of test or application, the in-service time (when available), temperature,

and other stress conditions under which the device failed.

b. System conditions: This shall include the exact location of failure in the equipment, date, test and inspection or

both, at which defect was first noted, any unusual environmental conditions and all related system anomalies noted

at time of removal of the failed unit. The equipment symptoms shall also be recorded.

c. General device information: This shall include part type numbers and serial numbers (when applicable), date

code, and other identifying information, and size of production or inspection lot (when applicable).

2. APPARATUS

. The apparatus required for failure analysis includes electrical test equipment capable of complete

electrical characterization of the device types being analyzed, micromanipulators capable of point-to-point probing on the

surface of device dies or substrates, as required, and microscopes capable of making the observations at the magnifications

indicated in the detailed procedures for the specified test condition. In addition, special analytical equipment for bright field,

dark field and phase contrast microscopy, metallographic sectioning, and angle lapping are required for the test condition C.

Special analytical equipment for test condition D are as detailed in the procedure and shall be available only as required for

each specific device analysis at that level. Apparatus for x-ray radiography, hermeticity test, and other specific test methods

shall be as detailed in the referenced method. Cleaning agents, chemicals for etching, staining, oxide, or metallization

removal shall be available as required.

3. PROCEDURE

. Failure analysis shall be performed in accordance with the specified test condition letter (see 4).

3.1. Test condition A. Failure verification

. This represents a minimal diagnosis, comprised of the electrical verification of

the failure including external and internal photographic recording of the suspected mode or mechanism of failure. The

following steps (see 3.1.1 through 3.1.5) shall be performed in the sequence indicated and the results included in the failure

analysis report. The sequence may be modified or additional tests performed when justified by an analysis of the results of

previous steps in the sequence.

3.1.1 External examination

. This shall include an optical examination at a magnification of 30X minimum of:

a. The condition of the leads, plating, soldered, or welded regions.

b. Condition of external package material, seals, marking, and other failures as warranted.

Photographic records shall be made at suitable magnification of any unusual features.

MIL-STD-883F

METHOD 5003

20 November 1969

3.1.2 Electrical verification procedures. This shall include the measurement of all electrical parameters in the applicable

acquisition document.

3.1.3 Additional electrical tests

. These shall be performed specifically for the determination of opens and shorts:

a. Threshold test. Determine the forward characteristic obtained for each pin to substrate and compare to the device

schematic and structure. Excessive forward voltage drop may indicate an open or an abnormally high resistance

current path.

b. Case isolation. (For metal packages or those with metal lids or headers only.) Apply a voltage between the

package and the external leads. Current flow determines the presence of shorts-to-case.

c. As an alternative to a. and b. above, suitable electrical tests may be made to determine that no opens, shorts, or

abnormal characteristics exist between pairs of pins, pins and die or substrate, or pins and device package.

3.1.4 Internal examination

. The lid of the failed device shall be carefully removed and an optical examination made of the

internal device construction at a minimum magnification of 30X. A color photograph, at suitable magnification to show

sufficient detail, shall be taken of any anomalous regions which may be related to the device failure.

3.1.5 Information obtainable

. The following is a partial list of failure modes and mechanisms which may be identified

using test condition A:

a. Overstress conditions resulting from device abuse, transients, or inadequate power supply regulation, evidenced

as open or shorted leads, and other metallization problems, such as flashover between contacts with the circuit.

b. Excessive leakage currents indicating degraded junctions.

c. Resistance changes.

d. Degradation of time response or frequency dependent parameters.

e. Opens and shorted leads or metallization land areas.

f. Undercut metals.

g. Intermetallic formation.

h. Poor bond placement and lead dress.

i. Thin metal at oxide steps.

j. Migration of metal.

k. Oxide contamination - discoloration.

l. Oxide defects, cracks, pinholes.

m. Mask misregistration.

n. Reactions at metal/semiconductor contact areas.

o. Degradation of lead at lead frame.