MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第585页

MIL-STD-883F METHOD 5003 20 November 1969 3 p. Shorts thr ough the oxide or diel ectr ic. q. Miss ing or peel ing metal s. r. Cor roded metals withi n package. s. Cr acked di e or subs trat e. 3.2 Test condit ion B . Thi…

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MIL-STD-883F
METHOD 5003
20 November 1969
2
3.1.2 Electrical verification procedures. This shall include the measurement of all electrical parameters in the applicable
acquisition document.
3.1.3 Additional electrical tests
. These shall be performed specifically for the determination of opens and shorts:
a. Threshold test. Determine the forward characteristic obtained for each pin to substrate and compare to the device
schematic and structure. Excessive forward voltage drop may indicate an open or an abnormally high resistance
current path.
b. Case isolation. (For metal packages or those with metal lids or headers only.) Apply a voltage between the
package and the external leads. Current flow determines the presence of shorts-to-case.
c. As an alternative to a. and b. above, suitable electrical tests may be made to determine that no opens, shorts, or
abnormal characteristics exist between pairs of pins, pins and die or substrate, or pins and device package.
3.1.4 Internal examination
. The lid of the failed device shall be carefully removed and an optical examination made of the
internal device construction at a minimum magnification of 30X. A color photograph, at suitable magnification to show
sufficient detail, shall be taken of any anomalous regions which may be related to the device failure.
3.1.5 Information obtainable
. The following is a partial list of failure modes and mechanisms which may be identified
using test condition A:
a. Overstress conditions resulting from device abuse, transients, or inadequate power supply regulation, evidenced
as open or shorted leads, and other metallization problems, such as flashover between contacts with the circuit.
b. Excessive leakage currents indicating degraded junctions.
c. Resistance changes.
d. Degradation of time response or frequency dependent parameters.
e. Opens and shorted leads or metallization land areas.
f. Undercut metals.
g. Intermetallic formation.
h. Poor bond placement and lead dress.
i. Thin metal at oxide steps.
j. Migration of metal.
k. Oxide contamination - discoloration.
l. Oxide defects, cracks, pinholes.
m. Mask misregistration.
n. Reactions at metal/semiconductor contact areas.
o. Degradation of lead at lead frame.
MIL-STD-883F
METHOD 5003
20 November 1969
3
p. Shorts through the oxide or dielectric.
q. Missing or peeling metals.
r. Corroded metals within package.
s. Cracked die or substrate.
3.2 Test condition B
. This is a more extensive procedure which supplements test condition A with x-ray radiography, seal
testing, additional electrical measurements, package cleaning, vacuum baking, and probing procedures to aid in
confirmation of suspected modes and mechanisms. The following steps shall be performed in the sequence indicated and
the results included in the failure analysis report. The sequence may be modified or additional tests performed when
justified by an analysis of the results of previous steps in the sequence.
3.2.1 External examination
. This shall include an optional examination at a magnification of 30X minimum of:
a. The conditions of leads, platings, soldered, or welded regions.
b. Condition of external package material, seals, markings, and other features as warranted.
Photographic records shall be taken at suitable magnification of any unusual features.
3.2.2 Electrical verification procedures
. This shall include the measurement of all electrical parameters in the applicable
acquisition document.
3.2.3 Additional electrical tests
. In addition to the threshold and case isolation tests, this section provides for curve tracer
pin to pin measurements and other nonstandard measurements which allow electrical characterization of significant physical
properties.
a. Threshold test. Determine the forward characteristic obtained for each pin to substrate and compare to the device
schematic and structure. Excessive forward voltage drop may indicate an open or abnormally high resistance in
the current path.
b. Case isolation. (For metal packages or those with metal lids or headers only.) Applying a voltage between the
package and the external leads. Current flow determines the presence of shorts-to-case.
c. Pin-to-pin two and three terminal electrical measurements utilizing a transistor curve tracer, electrometer,
picoammeter, capacitance bridge, and oscilloscope, as required, shall be performed and results recorded for lead
combinations involving the defective portion of the microcircuit. Gain, transfer, input versus output, forward and
reverse junction characteristics, shall be observed and interpreted. Resulting characteristics may be compared to
those obtained from a good unit, and differences interpreted for their relation to the device failure.
3.2.4 X-ray radiography
. A film record is required of the failed device taken normal to the top surface of the device, and
where applicable, additional views shall be recorded. This shall be performed when open or shorted leads, or the presence
of foreign material inside the device package are indicated from electrical verification of failure or there is evidence of
excessive temperature connected with the device failures.
3.2.5 Fine and gross seal testing
. This shall be performed in accordance with method 1014 of this standard.
MIL-STD-883F
METHOD 5003
20 November 1969
4
3.2.6 External package cleaning. When there is evidence of contamination on the package exterior, the device shall be
immersed in standard degreasing agents followed by boiling deionized water. After drying in clean nitrogen, critical
parameters in the applicable acquisition document shall be remeasured in accordance with 3.2.1 above.
3.2.7 Internal examination
. The lid of the failed device shall be carefully removed and an optical examination made of the
internal device construction, at a minimum magnification of 30X. A color photograph, at suitable magnification to show
sufficient detail, shall be taken of any anomalous regions which may be related to the device failure. Where there is
evidence of foreign material inside the device package, it shall be removed using a stream of dry compressed inert gas or
appropriate solvents. The relationship of the foreign material to device failure (if any) shall be noted and if possible, the
nature of the material shall be determined.
3.2.8 Electrical verification procedures
. Critical parameters of the individual specification shall be remeasured and
recorded.
3.2.9 Vacuum bake
. This shall be performed at the suggested condition 10
-5
torr, 150°C to 250°C for 2 hours noting any
change in leakage current, as a result of baking, using a microammeter.
3.2.10 Electrical verification procedures
. Critical parameters of the individual specification shall be remeasured and
recorded.
3.2.11 Multipoint probe
. A multipoint probe shall be used as applicable to probe active regions of the device to further
localize the cause of failure. A curve tracer shall be used to measure resistors, the presence of localized shorts and opens,
breakdown voltages, and transistor gain parameters. A microammeter shall be used for measuring leakage currents, and
where applicable, a capacitance bridge shall be employed for the determination of other junction properties. It may be
necessary to open metallization stripes to isolate components.
3.2.12 Information obtainable
. The procedures of test condition B can result in the following information in addition to that
outlined in 3.1.5:
a. Hermeticity problems.
b. Radiographically determined defects such as poor wire dress, loose bonds, open bonds, voids in die or substrate
mount, presence of foreign materials.
c. Further definition of failed device region.
d. Stability of surface parameters.
e. Quality of junctions, diffusions and elements.
3.3 Test condition C
. In this procedure additional metallographic analysis techniques are provided to supplement the
analysis accomplished in test condition B, and shall be performed after completion of the full procedure of test condition B.
In test condition C, one of the procedures (see 3.3.1, 3.3.2, and 3.3.3) shall be selected as appropriate and the steps shall
be followed in the sequences indicated. The sequence may be modified or additional tests performed when justified by the
analysis of the results of previous steps in the sequence.