MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第708页

MIL-STD-883F METHOD 5013 27 July 199 0 4 This page i ntenti onall y left bl ank

MIL-STD-883F

METHOD 5013

27 July 1990

3.3.1.1 Process monitor (PM). A process monitor (PM) is a collection of test structures which provide data for the

purposes of process control and determining wafer acceptability. PMs may be either stepped into every wafer in dedicated

drop-in locations, incorporated into kerf locations, located on each die, or combinations of these, such that they can be

probed at the conclusion of processing up to and including final front-side metallization and passivation (glassivation) where

applicable. PM structures, tests and acceptance limits shall be recorded in the baseline document. A suggested list is

shown in table I.

3.3.2 PM evaluation

. Wafer acceptance will be made on a wafer by wafer basis upon the information derived from PM

room temperature testing, which may be performed at any time during the manufacturing cycle. If drop-in PMs are utilized

each wafer shall have a sufficient number of PMs stepped in the center of each of the quadrants to assure the integrity of

the wafer acceptance procedure and the baseline SPC program. For kerf PMs and for PMs on individual die, the probed

PMs shall be located in the center of the wafer and in each of the quadrants. Quadrant PMs shall lie at least one-half of the

distance to the wafer edge away from the wafer center.

3.3.3 Visual/SEM inspection

. Inspection via visual microscopy or SEM shall be performed at critical process steps during

wafer fabrication. When the process flow includes substrate via processing, the backside features shall be visually

inspected to the criteria specified in test method 2010. Inspections may include patterns, alignment verniers, and critical

dimension measurements. Defective wafers shall be removed from the lot for scrap or for rework. Inspection operations,

sampling plans and acceptance criteria shall be documented in the process baseline.

3.3.4 Test results

. When required by the device specification or drawing or for qualification, the following test results shall

be made available for each wafer lot submitted.

a. Results of each test conducted; initial and any resubmissions.

b. Number of wafers accepted/rejected per lot.

c. Number of reworked wafers and reason for rework.

d. Measurements and records of the data for all specified PM electrical parameters.

3.3.5 Defective wafers

. All wafers that fail any test criteria shall be removed at the time of observation or immediately at

the conclusion of the test in which the failure was observed. Rejected wafers may be subjected to approved rework

operations as detailed in the baseline document. Once rejected and verified as an unreworkable failure, no wafer may be

retested for acceptance. Rejected wafers processed in accordance with approved rework procedures shall be resubmitted

to all applicable inspections at the point of rejection and must be found acceptable prior to continuing processing.

3.3.6 Element evaluation

. When specified, upon completion of wafer acceptance based on the baseline SPC program

and PM measurement results, 100 percent static/RF testing at 25°C shall be performed on each individual die. Failures

shall be identified and removed from the lot when the die are separated from the wafer.

MIL-STD-883F

METHOD 5013

27 July 1990

TABLE I. Test structures for use in a PM

N-channel transistors for measuring transistor parameters.

2. P-channel transistors for measuring transistor parameters.

3. Sheet resistance.

4. E-mode transistor parameters.

5. D-mode transistor parameters.

6. Isolation.

7. Contact resistance (via/ohmics).

8. Step coverage.

9. Alignment verniers.

10. Line width.

11. Diode parameters.

12. Backgating.

13. Doping profile structure.

14. FATFET.

15. Thin film resistor characteristics.

16. Capacitance value measurements.

MIL-STD-883F

METHOD 5013

27 July 1990

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