MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS - 第71页

MIL-STD-883F METHOD 1012.1 4 November 1980 7 3.3 Thermal respons e time, juncti on to spec ifi ed refer ence point , t JR . 3.3.1 Gener al cons iderat ions . W hen a s tep func tion of power dis sipat ion is applied t o …

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MIL-STD-883F
METHOD 1012.1
4 November 1980
6
If V
MD
(t) versus t
1/2
is plotted on linear graph paper for the first 100 µs of cooling, the generated curve will be a straight line
except during the initial portion where nonthermal switching transients dominate. The time t
2
is the minimum time at which
the TSP can be measured as determined from the linear portion of the V
MD
(t) versus t
1/2
cooling curve. Time t
1
should be at
least equal to t
2
+ 25 µs but less than 100 µs. The delay time before the TSP can be measured ranges from 1 to 50 µs for
most microelectronic devices. This extrapolation procedure is valid for semiconductor (junction) sensing elements >
0.2 mm
(8 mils) in diameter over the delay time range of interest (1 to 50 µs).
When the error in the calculated thermal resistance caused by using V
MD2
instead of the extrapolated value V
MD
(t = 0)
exceeds 5 percent, the extrapolated value of V
MD
shall be used for calculating the average junction temperature.
The heating power, P
D
, shall be chosen such that the calculated junction-to- reference point temperature difference as
measured at V
MD2
is greater than or equal to 20°C. The values of V
MD
, V
MC
, and P
D
are recorded during the power
application test.
The following data shall be recorded for these test conditions:
a. Temperature sensitive electrical parameters (V
F
, V
EB
(emitter-only switching), V
EB
(emitter and collector
switching), V
CB
, V
F(subst)
, or other appropriate TSP).
b. Average junction temperature, T
J(Avg)
, is calculated from the equation:
∆V
MC
- 1
T
J(AVG)
= T
R
+ (V
MD
- V
MC
),
∆T
MC
where: T
R
= T
C
or T
M
c. Case or mounting surface temperature, T
C
or T
M
, (usually 60° ±0.5°C).
d. Power dissipation, P
D
where P
D
= P
D(Package)
or P
D(Element)
.
e. Mounting arrangement.
3.2.3.2 Typical test circuits for indirect measurements of T
J(Avg)
. The circuit on figure 1012-3 can be used to sense V
F
,
V
EB
(emitter-only switches), V
EB
(emitter and collector switching), and V
CB
. The circuit is configured for heating power to be
applied only to the junction element being sensed P
D(Element)
for illustration purposes only.
The circuit on figure 1012-3 is controlled by a clock pulse with a pulse width less than or equal to 100 µs and repetition rate
less than or equal to 66.7 Hz. When the voltage level of the clock pulse is zero, the transistor Q1 is off and transistor Q2 is
on, and the emitter current through the device under test (DUT) is the sum of the constant heating current and the constant
measuring current. Biasing transistor Q1 on, shunts the heating current to ground and effectively reverse biases the diode
D1. The sample-and-hold unit is triggered when the heating current is removed and is used to monitor the TSP of the device
under test. During calibration, switch S4 is open.
The circuit on figure 1012-4 can be used to sense the forward voltage of the substrate diode of a junction isolated integrated
circuit. In this test circuit the microelectronic device under test is represented by a single transistor operated in a
common-emitter configuration. The substrate diode D
SUBST
is shown connected between the collector (most positive
terminal) and the emitter (most negative terminal) of the integrated circuit under test. The type of circuitry needed to
interrupt the heating power will depend on the complexity of the integrated circuit being tested.
The circuit on figure 1012-4 is controlled by a clock pulse with a pulse width less than or equal to 100 µs and repetition rate
less than or equal to 66.7 Hz. When the voltage level of the clock pulse is zero, transistor Q1 being off and transistor Q2 on,
the device under test is dissipating heating power. Biasing transistor Q1 on and Q2 off, interrupts the heating power and
forward biases the substrate diode. The sample-and-hold unit is triggered when the heating current is removed and is used
to monitor the substrate diode forward voltage. During calibration, switch S1 is open.
MIL-STD-883F
METHOD 1012.1
4 November 1980
7
3.3 Thermal response time, junction to specified reference point, t
JR
.
3.3.1 General considerations
. When a step function of power dissipation is applied to a semiconductor device, the
junction temperature does not rise as a step function, but rather as a complex exponential curve. An infrared
microradiometer or the electrical technique, in which a precalibrated temperature sensitive device parameter is used to
sense the junction temperature, shall be used to generate the microelectronic device thermal response time.
When using electrical techniques, in which the device heating power is removed before the TSP is sensed for measuring the
thermal response time, the cooling curve technique shall be used. The measurement of the cooling curve is performed by
heating the device to steady state, switching the power off, and monitoring the junction temperature as the device cools.
The cooling curve technique is based upon the assumption that the cooling response of a device is the conjugate of the
heating response.
3.3.2 Measurement of junction temperature as a function of time for the determination of t
JR
. The change in junction
temperature as a function of time resulting from the application or removal of a step function of heating power dissipation in
the junction(s) shall be observed using an infrared microradiometer with a response time of less than 100 µs, or electrical
equipment with a response time of less than 100 µs and sufficient sensitivity to read a precalibrated temperature sensitive
electrical parameter of the junction. During this test the device reference point temperature, as specified, shall be held
constant, the step function of power dissipation shall be applied or removed, and the waveform of the junction temperature
response versus time shall be recorded from the time of power application or removal to the time when the junction
temperature reaches a stable value.
The following data shall be recorded for this test condition:
a. Temperature sensitive electrical parameter (see section 3.2.3).
b. Infrared microscope spatial resolution (see section 3.2.2).
c. Peak, average, or region junction temperature as a function of time (see section 3.2.2 or 3.2.3 for details).
d. Case or mounting surface temperature T
C
or T
M
(usually 60°C ±0.5°C).
e. Power dissipation, P
D(Package)
or P
D(Element)
m in the package.
f. Reference temperature measuring point.
g. Mounting arrangement.
3.3.3 Typical test circuits for measurement of junction temperature as a function of time
. The circuits depicted in section
3.2.3 are also used for the measurement of junction temperature as a function of time. The clock pulse is varied to give the
required step of heating power and the TSP is monitored on a cathode ray oscilloscope. When an infrared microradiometer
is used, the measuring current and TSP sensing circuitry is disconnected.
MIL-STD-883F
METHOD 1012.1
4 November 1980
8
3.4 Calculations of R
θJR
and t
JR
.
3.4.1 Calculations of package thermal resistance
. The thermal resistance of a microelectronic device can be calculated
when the peak junction, average junction, or region junction temperature, T
J(Peak)
, T
J(Avg)
, or T
J(Region)
, respectively, has been
measured in accordance with procedures outlined in sections 3.1 and 3.2. If the total package capability is to be assessed,
then rated power P
D(Packages)
should be applied to the device under test. For quality control purposes the power dissipation in
the single test junction P
H(Element)
can be used in the calculation of thermal resistance.
With the data recorded from each test, the thermal resistance shall be determined from:
R
θJC(PEAK)
= T
J(PEAK)
- T
C
, junction peak-to-case;
P
D(Package)
R
θJC(Avg)
= T
J(Avg)
- T
C
, junction average-to-case; or
P
D(Package)
R
θJC(Region)
= T
J(Region)
- T
C
, junction region-to-case;
P
D(Package)
For calculations of the junction element thermal resistance, P
D(Element)
should be used in the previous equations. Note that
these thermal resistance values are independent of the heat sinking technique for the package. This is possible because
the case or chip carrier (reference) temperature is measured on the package itself in an accessible location which provides
a representative temperature in the major path of heat flow from the chip to the heat sink via the package.
3.4.2 Calculation of package thermal response time
. The thermal response time of a microelectronic device can be
calculated when the peak junction, average junction, or region junction temperature, T
J(Peak)
, T
J(Avg)
, or T
J(Region)
, respectively,
has been measured as a function of time in accordance with procedures outlined in section 3.3. If the total package
capability is to be assessed, then rated power P
D(Package)
should be applied to the device under test. For quality control
purposes the power dissipation in the single test junction P
D(Element)
can be used in the calculation of thermal response time.
With the data recorded from each test, the thermal response time shall be determined from a curve of junction temperature
versus time from the time of application or removal of the heating power to the time when the junction temperature reaches a
stable value. The thermal response time is 0.9 of this difference.
4. SUMMARY
. The following details shall be specified in the applicable acquisition document:
a. Description of package; including number of chips, location of case or chip carrier temperature measurement(s),
and heat sinking arrangement.
b. Test condition(s), as applicable (see section 3).
c. Test voltage(s), current(s) and power dissipation of each chip.
d. Recorded data for each test condition, as applicable.
e. Symbol(s) with subscript designation(s) of the thermal characteristics determined to verify specified values of
these characteristics, as applicable.
f. Accept or reject criteria.