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CM108AH

Highly Integrated USB Audio I/O Controller

www.cmedia.com.tw

3.3 Pin Signal Descriptions

Pin #

Symbol

Type

Description

1

SPDIFO

DO, 8mA, SR

SPDIF output

2

DI

DIO, 8mA,

PD, 5VT

EEPROM interface data read from EEPROM

3

DO

DO, 4mA, SR

EEPROM interface data write to EEPROM

4

SK

DO, 4mA, SR

EEPROM interface clock

5

CS

DO, 4mA, SR

EEPROM interface chip select

6

MUTER

DI, ST, PU

Mute recording (edge trigger with de-bouncing)

7

PWRSEL

DI, ST

Chip power select pin, worked by MODE Pin

Speaker mode – H: 100mA self-powered

L: 500mA Bus-powered

Headset mode – H: 100mA Bus-powered,

L: 500mA Bus-powered

(H: push up to 3.3V, L: push down to ground)

8

XI

DI

Input pin for 12MHz oscillator

9

XO

DO

Output pin for 12MHz oscillator

10

MODE

DI, ST

Operating mode selection

H: speaker mode - playback only

L: headset mode - playback & recording

(H: push up to 3.3V, L: pull down to ground)

11

N.C.

12

LEDO

DO, SR, 8mA

LED operation light: output H for power on, toggling for data transmit

13

GPIO3

DIO, 8mA,

PD, 5VT

GPIO pin

14

DVSS1

P

Digital ground

15

GPIO4

DIO, 8mA,

PD, 5VT

GPIO pin

16

SDIN

DIO, 8mA,

PD, 5VT

ADC I2S data input

17

ADSCLK

DIO, 4mA, SR

ADC I2S serial clock

18

MUTEP

DI, ST, PU

Mute playback (edge trigger with de-bouncing)

19

ADLRCK

DO, 4mA, SR

ADC I2S left/right clock

20

ADMCLK

DIO, 4mA, SR

11.2896MHz output for 44.1KHz sampled data and

12.288MHz output for 48KHz sampled data

21

LEDR

DO, SR, 8mA

LED for mute recording indicator, output H when recording is muted

22

ADSEL

DI, ST, PD

ADC input source select pin

H: use external (via I2S) ADC

L: use internal ADC

(H: push up to 3.3V, L: push down to ground)

23

TEST

DI, ST, PD

Test mode select pin,

H: test mode

L: normal operation

(H: push up to 3.3V, L: push down to ground)

24

AVSS1

P

Analog ground

25

VBIAS

AO

Microphone bias voltage supply (4.5V), with small driving capability

26

VREF

AO

Connecting to external decoupling capacitor for embedded bandgap

circuit, 2.25V output

27

MICIN

AI

Microphone input

28

N.C.

29

AVDD1

P

5V analog power for analog circuit

30

LOL

AO

Line out: left channel

31

LOBS

AO

DC 2.25V output for line out bias

32

LOR

AO

Line out: right channel

33

AVSS2

P

Analog ground

CM108AH

Highly Integrated USB Audio I/O Controller

www.cmedia.com.tw

34

AVDD2

P

5V power supply for analog circuit

35

DVDD

P

5V power supply for internal regulator

36

DVSS2

P

Digital ground

37

REGV

AO

3.3V reference output for internal 5V to 3.3V regulator

38

MSEL

DI, ST

Mixer enable select, worked by MODE pin,

H: with mixer/AA-path enabled (with default mute)

L: without mixer/AA-path disabled

(H: push up to 3.3V, L: push down to ground)

USB descriptors will also be changed accordingly

39

VOLUP

DI, ST, PU

Volume up (edge trigger with de-bouncing)

40

PDSW

DO, 4mA , OD

Power down switch control signal (for PMOS polarity)

0: normal operation

1: power down mode (suspend mode)

41

USBDP

AIO

USB Data D+

42

USBDM

AIO

USB Data D-

43

GPIO1

DIO, 8mA,

PD, 5VT

GPIO pin

44

SDOUT

DO, 4mA, SR

DAC I2S data output

45

DAMCLK

DO, 4mA, SR

11.2896 MHz output for 44.1KHz sampled data and

12.288 MHz output for 48KHz sampled data

46

DALRCK

DO, 4mA, SR

DAC I2S left/right clock

47

DASCLK

DO, 4mA, SR

DAC I2S serial clock

48

VOLDN

DI, ST, PU

Volume down (edge trigger with de-bouncing)

NoteU: DI / DO / DIO – Digital Input / Output / Bi-Directional Pad

AI / AO / AIO – Analog Input / Output / Bi-Directional Pad

SR – Slew Rate Control

ST – Schmitt Trigger

PD / PU – Pull Down / Pull Up

5VT – 5 Volt Tolerant (3.3V Pad)

OD – Open Drain

CM108AH

Highly Integrated USB Audio I/O Controller

www.cmedia.com.tw

4 I²S Interface

The CM108AH provides an IP

2

P

S interface for both playback and recording. External ADC, DAC, or DSP can be

added to provide additional functions within the USB audio system. The CM108AH sends out master clock (fixed

at x256), LRCK (fixed at x64), and data clock data. Therefore, external ADCs, DACs, or DSPs should be set to

slave mode.

The left channel of the CM108AH’s IP

2

P

S bus is used for mono recording. Both IP

2

P

S buses use a 5V tolerant pad in

order to easily interface with 5V or 3.3V devices. Playback data is simultaneously sent to both the DAC and IP

2

P

S

bus. The recording source (ADC or IP

2

P

S bus) can be selected by ADSEL jumper pin.

LRCK

SCLK

MSB -1 -2 +2 +1 LSB MSB -1 -2 +2 +1 LSB

SDATA

Left Channel

Right Channel