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Installation Manual Station Software Version 601.02 SP1 Edition 10/2005 46 of 82 4.5.1.10 Setup page "IMC Miscellaneous" In the "Selection options" column, the setti ng for fail-safe default is indica…

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Installation Manual Station Software Version 601.02 SP1 Edition 10/2005
45 of 82
Menu item Note Selection options
Onboard Parallel
Port
Sets the I/O addresses and IRQs of the parallel port: 3BC/IRQ7
Disabled
Parallel Port Mode
Sets the mode of the parallel port. This option can be set
when disabled is not set for Onboard Parallel Port
Default
SPP
EPP1.7
EPP1.9
ECP
ECP+EPP
ECP Mode Use DMA
This option can only be set if ECP or ECP+EPP is selected
for Parallel Port Mode.
1
3
Installation Manual Station Software Version 601.02 SP1 Edition 10/2005
46 of 82
4.5.1.10 Setup page "IMC Miscellaneous"
In the "Selection options" column, the setting for fail-safe default is indicated in italics and the setting
for optimized default is underlined
.
Menu item Note Selection options
Priority for PCI
Bridge
Assigns a higher priority to the PCI bridge to the CPCI bus
in busmaster operation. This may be needed if high data
transfer rates between the CPCI bus and RAM are
required.
Normal
High
Boot Delay
This can be used to set a delay during which the BIOS
waits until the operating system has been booted.
Disabled
15 Sec.
30 Sec.
45 Sec.
60 Sec
1:30 Min.
2 Min.
3 Min.
5 Min.
10 Min.
Enable CTRL-
C/CTRL-Break
When No is entered, the keystrokes <CTRL-C>/<CTRL-
Break> are trapped by the BIOS and not passed on to the
operating system. The keys can be re-enabled by entering
Yes. This function can also be changed by the user during
live operation. If a software interrupt of 16h is triggered
with AH = 3, AL = 49h and BL = 0, <CTRL-C>/<CTRL-
Break> is permitted, and these key combinations are
suppressed with BL = 1.
Yes
No
SMP16-Bus
If this option is set to disabled, the SMP16 bus will be
switched to high resistance after the boot process.
Adapters on this bus cannot be accessed.
Enabled
Disabled
SMP16-Clocks
This option can be used to switch off the 8.33 MHz and
14.131 MHz clock cycle of the SMP16 bus. This setting is
only possible when the SMP16 bus is enabled.
Enabled
Disabled
8 Bit I/O Recovery
Time
Number of additional ISA clock cycles between two 8-bit
I/O accesses to the SMP16 bus.
1
1 ... 16
16 Bit I/O Recovery
Time
Number of additional ISA clock cycles between two 16-bit
I/O accesses to the SMP16 bus.
1
1 ... 16
Use of LED L1
LAN speed:
The LED is lit when the onboard LAN
is activated and the
transfer speed is100MB
User:
The LED can be switched on/off by the
user
(Bit 1 of I/O address 5400H)
LAN speed:
User
Installation Manual Station Software Version 601.02 SP1 Edition 10/2005
47 of 82
Menu item Note Selection options
Use of LED L2
prim./sec. HD: The LED is lit when a primary or
secondary
hard disk is activated
User: The LED can be switched on/off by the
user
(Bit 0 of I/O address 5400H)
prim./sec. HD:
User
IOCHCK-NMI
This option specifies whether the NMI is enabled or
disabled after the boot process.
Enabled
Disabled
On board SRAM size
This sets the size of an address window on the onboard
SRAM. The following settings are possible:
Other settings can be made by the user's application.
Disabled
8 KByte
16 KByte
32 KByte
On board SRAM
base adr.
This value is used to specify the base address of the
SRAM window. This value can only be set if the SRAM is
not disabled. The choice of base address depends on the
window size which has been set.
CC000H
1)
CE000H
2)
D0000H
3)
D2000H
2)
D4000H
1)
D6000H
2)
D8000H
3)
DA000H
2)
DC000H
1)
DE000H
2)
Fanless Operation
When this option is enabled, the module can be operated
without fans. The processor then only operates for 50 % of
the time.
Enabled
Disabled
1) with SRAM size 8/16 KByte 2) with SRAM size 8 KByte 3) with SRAM size 8/16/32 KByte
4) This item is only visible for processors = 866MHz