C371346_375F2440A66FD1C882296D07948AE54C.pdf - 第8页
CM 108AH Highly Integrated USB Audio I/O Controller www .cmedia.com.tw Copyright© C-Media Electro nics Inc. R ev . 2.1 ︱ P age 8 /27 4 I² S Interface The CM108AH provi des an I P 2 P S interface fo r both playba ck and r…
CM108AH
Highly Integrated USB Audio I/O Controller
www.cmedia.com.tw
Copyright© C-Media Electronics Inc. Rev. 2.1︱ Page 7/27
34
AVDD2
P
5V power supply for analog circuit
35
DVDD
P
5V power supply for internal regulator
36
DVSS2
P
Digital ground
37
REGV
AO
3.3V reference output for internal 5V to 3.3V regulator
38
MSEL
DI, ST
Mixer enable select, worked by MODE pin,
H: with mixer/AA-path enabled (with default mute)
L: without mixer/AA-path disabled
(H: push up to 3.3V, L: push down to ground)
USB descriptors will also be changed accordingly
39
VOLUP
DI, ST, PU
Volume up (edge trigger with de-bouncing)
40
PDSW
DO, 4mA , OD
Power down switch control signal (for PMOS polarity)
0: normal operation
1: power down mode (suspend mode)
41
USBDP
AIO
USB Data D+
42
USBDM
AIO
USB Data D-
43
GPIO1
DIO, 8mA,
PD, 5VT
GPIO pin
44
SDOUT
DO, 4mA, SR
DAC I2S data output
45
DAMCLK
DO, 4mA, SR
11.2896 MHz output for 44.1KHz sampled data and
12.288 MHz output for 48KHz sampled data
46
DALRCK
DO, 4mA, SR
DAC I2S left/right clock
47
DASCLK
DO, 4mA, SR
DAC I2S serial clock
48
VOLDN
DI, ST, PU
Volume down (edge trigger with de-bouncing)
NoteU: DI / DO / DIO – Digital Input / Output / Bi-Directional Pad
AI / AO / AIO – Analog Input / Output / Bi-Directional Pad
SR – Slew Rate Control
ST – Schmitt Trigger
PD / PU – Pull Down / Pull Up
5VT – 5 Volt Tolerant (3.3V Pad)
OD – Open Drain
CM108AH
Highly Integrated USB Audio I/O Controller
www.cmedia.com.tw
Copyright© C-Media Electronics Inc. Rev. 2.1︱ Page 8/27
4 I²S Interface
The CM108AH provides an IP
2
P
S interface for both playback and recording. External ADC, DAC, or DSP can be
added to provide additional functions within the USB audio system. The CM108AH sends out master clock (fixed
at x256), LRCK (fixed at x64), and data clock data. Therefore, external ADCs, DACs, or DSPs should be set to
slave mode.
The left channel of the CM108AH’s IP
2
P
S bus is used for mono recording. Both IP
2
P
S buses use a 5V tolerant pad in
order to easily interface with 5V or 3.3V devices. Playback data is simultaneously sent to both the DAC and IP
2
P
S
bus. The recording source (ADC or IP
2
P
S bus) can be selected by ADSEL jumper pin.
LRCK
SCLK
MSB -1 -2 +2 +1 LSB MSB -1 -2 +2 +1 LSB
SDATA
Left Channel
Right Channel
CM108AH
Highly Integrated USB Audio I/O Controller
www.cmedia.com.tw
Copyright© C-Media Electronics Inc. Rev. 2.1︱ Page 9/27
5 Block Diagram
USB
TRX
USB
interface
4 byte
FIFO
USB control
processing
ISO out
processing
( with x2 mod)
PLL1
48 MHz
ROM
PLL2
12. 288 /11. 2896 MHz
with adjustment
12 MHz
VREF
(2.25V)
power on
reset
reset
16 bit
DAC
bandgap
3.3V
+
-
+
-
Vref
5 - > 3. 3
regulator
REGV
ISO in
processing
300 x 16 SRAM
16 bit Sigma-
Delta ADC
16 bit
DAC
+
-
Vref
+22.5~ - 0 dB
16 steps
Vref
PLL3
12. 288/
11. 2896 MHz
USB interrupt
processing with 4
byte FIFO
interface logics
MUTER
MCU
I/F
VOLDN
VOLUP
VREF
MUTEP
LOL
LOR
LEDO
LEDR
PDSW
+
-
+22. 5 ~ 0 dB
16 steps
Vref
0 ~ -45dB
38 steps
voltage linear
VBIAS
4.5 V ( drive typ 4mA)
EEPROM
interface
CS
SK
DW
DR
USBDP
USBDM
XI
XO
MICIN
+
-
Vref
Vref
+
-
+
-
Vref
LOBS
GPIO
BOOST
+22.5
dB boost enable
0 ~ -45dB
38 steps
voltage linear
PWRSEL
MODE
SEL pins
TEST
sync by
VPR_CLK
sync by
VPL_CLK
BUZZ
IIS I/F
SPDIFO
High-Pass Filter
CM108AH Block Diagram