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CM108B USB Audio Single C hip Datasheet Revision: 1.11 www .cmedia.com.tw P age 7 / 24 Copyright© C -Media Elect ronics Inc. 4.3 Pin signal descriptions Pin # Symbol Type Description 1 SPDIFO DO, 4mA, SR SPDIF output 2 D…
CM108B
USB Audio Single Chip
Datasheet Revision: 1.11 www.cmedia.com.tw
Page 6 / 24 Copyright© C-Media Electronics Inc.
4 Pin descriptions
4.1 Pin assignment by pin number
Pin #
Signal Name
Pin #
Signal Name
Pin #
Signal Name
Pin #
Signal Name
1
SPDIFO
13
GPIO3
25
VBIAS
37
AREG36
2
DR
14
DVSS
26
VREF
38
MSEL
3
DW
15
GPIO4
27
MICIN
39
VOLUP
4
SK
16
SDIN
28
N.C.
40
PDSW
5
CS
17
ADSCLS
29
AVDD
41
USBDP
6
MUTER
18
MUTEP
30
LOL
42
USBDM
7
PWRSEL
19
ADLRCK
31
LOBS
43
GPIO1
8
DREG18
20
ADMCLK
32
LOR
44
SDOUT
9
DREG33
21
LEDR
33
AVSS
45
DAMCLK
10
MODE
22
ADSEL
34
AVDD
46
DALRCK
11
N.C.
23
TEST
35
DVDD
47
DASCLK
12
LEDO
24
AVSS
36
DVSS
48
VOLDN
4.2 Pin-out diagram
CM108B
LQFP-48
1
2
3
4
5
6
7
8
9
10
11
12
SPDIFO
DR
DW
SK
CS
MUTER
PWRSEL
DREG18
DREG33
MODE
N.C.
LEDO
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
AVSS
TEST
ADSEL
LEDR
ADMCLK
ADLRCK
MUTEP
ADSCLK
SDIN
GPIO4
DVSS
GPIO3
37
38
39
40
41
42
43
44
45
46
47
48
AREG36
MSEL
VOLUP
PDSW
USBDP
USBDM
GPIO1
SDOUT
DAMCLK
DALRCK
DASCLK
VOLDN
DVSS
DVDD
AVDD
AVSS
LOR
LOBS
LOL
AVDD
N.C.
MICIN
VREF
VBIAS
Pin Assignments (top view)
CM108B
USB Audio Single Chip
Datasheet Revision: 1.11 www.cmedia.com.tw
Page 7 / 24 Copyright© C-Media Electronics Inc.
4.3 Pin signal descriptions
Pin #
Symbol
Type
Description
1
SPDIFO
DO, 4mA, SR
SPDIF output
2
DR
DI, 8mA, PD, 5VT
EEPROM interface data read from EEPROM
3
DW
DO, 4mA, SR
EEPROM interface data write to EEPROM
4
SK
DO, 4mA, SR
EEPROM interface clock
5
CS
DO, 4mA, SR
EEPROM interface chip select
6
MUTER
DI, ST, PU
Mute recording (edge trigger with de-bouncing)
7
PWRSEL
DI, ST, PU
Chip power select pin:
H: push up to 3.3V, L: push down to ground
Speaker mode – H: 100mA self-powered, L: 500mA Bus-powered
Headset mode – H: 100mA Bus-powered, L: 500mA Bus-powered
8
DREG18
P
1.8V Regulator Output for Digital Core
9
DREG33
P
3.3V Regulator Output for Digital I/O (driving current 40mA)
10
MODE
DI, ST, PD
Operating mode selection:
H: push up to 3.3V, L: pull down to ground
H: speaker mode - playback only
L: headset mode - playback & recording
11
N.C.
12
LEDO
DO, SR, 4mA
LED operation light: output H for power on, toggling for data transmit
13
GPIO3
DIO, 8mA, PD, 5VT
GPIO pin
14
DVSS
P
Digital ground
15
GPIO4
DIO, 8mA, PD, 5VT
GPIO pin
16
SDIN
DIO, 8mA, PD, 5VT
ADC I2S data input
17
ADSCLK
DO, 2mA, SR
ADC I2S serial clock
18
MUTEP
DI, ST, PU
Mute playback (edge trigger with de-bouncing)
19
ADLRCK
DO, 2mA, SR
ADC I2S left/right clock
20
ADMCLK
DO, 2mA, SR
11.2896MHz output for 44.1KHz sampled data and
12.288MHz output for 48KHz sampled data
21
LEDR
DO, SR, 4mA
LED for mute recording indicator, output H when recording is muted
22
ADSEL
DI, ST, PD
ADC input source select pin
H: use external (via I2S) ADC
L: use internal ADC
(H: push up to 3.3V, L: push down to ground)
23
TEST
DI, ST, PD
Test mode select pin,
H: test mode
L: normal operation
(H: push up to 3.3V, L: push down to ground)
24
AVSS
P
Analog ground
25
VBIAS
AO
Microphone bias voltage supply (3V), with a small driving capability
26
VREF
AO
Connecting to external decoupling capacitor for embedded bandgap
circuit, 1.75V output
27
MICIN
AI
Microphone input, input impedance is 10k Ohm
28
N.C.
29
AVDD
P
5V analog power for analog circuit
30
LOL
AO
Line out: left channel
31
LOBS
AO
DC 1.75V output for line out bias
32
LOR
AO
Line out: right channel
33
AVSS
P
Analog ground
34
AVDD
P
5V power supply for analog circuit
35
DVDD
P
5V power supply for internal regulator
36
DVSS
P
Digital ground
37
AREG36
P
3.6V analog power for analog circuit
CM108B
USB Audio Single Chip
Datasheet Revision: 1.11 www.cmedia.com.tw
Page 8 / 24 Copyright© C-Media Electronics Inc.
38
MSEL
DI, ST, PU
Mixer enable select:
H: push up to 3.3V, L: push down to ground
H: with mixer/AA-path enabled (with default mute)
L: without mixer/AA-path disabled
USB descriptors will also be changed accordingly
39
VOLUP
DI, ST, PU
Volume up (edge trigger with de-bouncing)
40
PDSW
DO, 4mA , OD
Power down switch control signal (for PMOS polarity)
0: normal operation
1: power down mode (suspend mode)
41
USBDP
AIO
USB Data D+
42
USBDM
AIO
USB Data D-
43
GPIO1
DIO, 8mA, PD, 5VT
GPIO pin
44
SDOUT
DO, 2mA, SR
DAC I2S data output
45
DAMCLK
DO, 2mA, SR
11.2896 MHz output for 44.1KHz sampled data and
12.288 MHz output for 48KHz sampled data
46
DALRCK
DO, 2mA, SR
DAC I2S left/right clock
47
DASCLK
DO, 2mA, SR
DAC I2S serial clock
48
VOLDN
DI, ST, PU
Volume down (edge trigger with de-bouncing)
NoteU: DI / DO / DIO – Digital Input / Output / Bi-Directional Pad
AI / AO / AIO – Analog Input / Output / Bi-Directional Pad
SR – Slew Rate Control
ST – Schmitt Trigger
PD / PU – Pull Down / Pull Up
5VT – 5 Volt Tolerant (3.3V Pad)
OD – Open Drain
P – Power Supply Pin