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Installation Manual Station Software Version 601.02 SP1 Edition 10/2005 66 of 82 4.7.3 Setup page "Advanced Chipset Features" Menu item Note Selection options Settings Note DRAM Data Integrity Mode If ECC memor…

Installation Manual Station Software Version 601.02 SP1 Edition 10/2005

65 of 82

4.7.2.1 "CPU Feature" submenu

Menu item Note Selection options Settings Note

CPU

Frequency

Specifying a lower clock frequency and thus

reducing dissipation allows the machine to be used

without a fan at higher ambient temperatures.

Full

1,100MHz

900MHz

600MHz

Full

Thermal

Management

The processor features built-in monitoring of the

core temperature. The selected function is executed

if this threshold is exceeded.

Thermal Monitor 1: If the temperature threshold is

exceeded, the CPU clock speed is switched on and

off at a sampling rate of 50% until the temperature

falls below the threshold.

Thermal Monitor 2: If the temperature threshold is

exceeded, the CPU clock speed is slowed to a

multiple of the FSB (100 MHz). This value is

specified in TM2 Bus Ratio. Additionally, the core

voltage of the CPU is lowered to the value set in

TM2 Bus VID. Both these actions reduce the

dissipation of the CPU. After the temperature falls

below the threshold again, the maximum value of

16X/1.484V is reset.

Disabled: Internal processor monitoring is disabled.

Thermal Monitor 1

Thermal Monitor 2

Disabled

Thermal

Monitor 1

TM2 Bus Ratio

Multiple of the FSB (100 or 133MHz). The CPU

clock speed is reduced to this value if the internal

temperature threshold is exceeded.

6X; 7X; 8X; 9X; 10X; 11X;

12X; 13X; 14X; 15X; 16X

16X at

1.6GHz

11X at

1.1GHz

9X at

900MHz

6X at

600MHz

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4.7.3 Setup page "Advanced Chipset Features"

Menu item Note Selection options Settings Note

DRAM Data

Integrity Mode

If ECC memory modules are fitted, this setting

allows you to specify whether or not ECC is used.

This menu item cannot be changed if ECC memory

modules are not fitted.

Non-ECC

ECC

Non-ECC

MGM Core

Frequency

Specifies the frequency for the FSB, the memory

interface and the graphics controller.

The first entry specifies the FSB. If Auto is

specified, the default value for the processor is

used.

The second entry specifies the frequency of the

memory interface. Max sets the maximum possible

frequency (specified in the SPD of the DDR

SODIMM). If the frequency is changed from 333 to

266/200 or from 266 to 200, a Power On is

necessary after you exit Setup.

The third entry specifies the fixed clock frequency of

the graphics core.

In all other cases, the third and fourth values specify

the upper and lower limit for the graphics core. The

graphics controller switches dynamically within the

specified range depending on the load.

Auto Max 266MHz

400/266/133/200 MHz

400/200/100/200 MHz

400/200/100/233 MHz

400/266/133/267 MHz

400/333/166/250 MHz

Auto Max 400/333MHz

Auto Max

400/333MHz

System BIOS

Cacheable

This function enables the system to cache the BIOS

area as well.

Enabled

Disabled

Enabled

Video BIOS

Cacheable

This function enables the system to cache the VGA-

BIOS area as well.

Enabled

Disabled

Enabled

Memory Hole At

15M-16M

If this function is enabled, the memory hole from 15

MB through 16 MB is reserved for ISA expansion

boards which require this setting. Depending on the

operating system used, the memory ceases to be

available to the system as of 15 MB. Expansion

boards can only address memories of up to 16 MB.

Enabled

Disabled

Delayed

Transaction

When set to Enabled, this option enables the 32-bit

write buffer for PCI access.

Enabled

Disabled

Enabled

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Menu item Note Selection options Settings Note

On-Chip VGA

This item specifies whether the onboard VGA is

enabled or not.

Enabled

Disabled

Enabled

On-Chip Frame

Buffer Size

Specifies the size of the main memory slot reserved

for the graphics adapter. Depending on the screen

resolution, the Windows graphics drivers can

reserve up to 32 MB main memory irrespective of

the value set here. This item is only active if the

’On-Chip VGA’ item is enabled.

1MB

4MB

8MB

16MB

32MB

Boot Display

This item is only active if the ’On-Chip VGA’ item is

enabled.

This item is for future video/BIOS configurations

and currently has no effect. Allows you to specify

the interface(s) for graphics output.

VBIOS default: Output sequence as defined

in the Video BIOS

CRT: Analog monitor interface

EFP: DVI Interface

(only for DVI option)

CRT+EFP:

Output to both interfaces

VBIOS Default

CRT

EFP

CRT+EFP

VBIOS Default