IPC-CM-770D-1996.pdf - 第128页

January

1996

IPC-CM-770

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Figure 24-6 TAB Mounting Options

TAB is also used for small-size and relatively-low cost

military personnel “dogtags.“ In addition, TAB dice are

replacing conventional through-hole and surface mounting

printed wiring board assemblies in several applications.

TAB is also being used to package gate array dice for mid-

range and high-end computers, because of its ability to

support high lead counts (300+) with good electrical per-

formance.

24.7 Pattern Standardization (TAB Tape)

This section

describes the preliminary outlines and features for JEDEC

registered TAB tape (Figure 24-7). Unlike other surface-

mount components, TAB tape is delivered to the user in a

format that is different from the package format after bond-

ing to the substrate. Test lands and supporting areas are cut

away or excised prior to packaging or board mounting.

Because each IC die may have different pad pitches, pad

dimensions, and pad

X

and

Y

locations, only those features

outside the die area can be standardized. Features that can

be registered are:

-

Package size prior to the leads begin formed, in an “as-

shipped” condition.

-

Package body size after lead forming and excising

-

The outer lead window inside dimension

-

Test pad size and location

-

Outer lead dimension and pitch

-

Registration Features

The following are suggested guidelines for good lead

forming:

-Bend radii of 0.125mm

-

Lead forming angle of

10

degrees

-

Polyimide-up configuration

-

Foot length of 0.75mm

-

Inner clamping distance,

S

1

of 0.375mm

-

Height above board or substrate to be determined by

user (depending on die thickness, board clearance

desired, etc.).

TAB footprints are designed with the same principles used

in the design of fine pitch chip carrier footprints to provide

a robust assembly process and a reliable product.

24.8 Encapsulation

Encapsulation involves placing a

protective coating on the top and/or bottom surface of the

inner-lead bonded device; coating on the active side of the

chip, and optionally on all six sides. The reasons for encap-

sulation includes the following:

-

Protection from mechanical damage-scratches, bending,

etc.

-Protection from surface contaminants

-

solvents, par-

ticles, dust, etc.

-Protection from edge shorts

-

created when the lead

touches the scribed edge of the device.

-

Increased long-term reliability

-

by protecting the device

from moisture and the environment

24.8.1 Encapsulation Types

The following encapsulants

are used for protection of TAB devices.

24.8.1.1 Unfilled Epoxies

Epoxy types available include

anhydride and novotac epoxies. Ionic impurity levels with

chloride ion under

5

ppm are available. Typical coating

thickness for an unfilled epoxy is

0.05

to 0.25mm. Epoxies

are generally heat-cured.

24.8.1.2 Filled Epoxies

These are epoxies that have

been filled with quartz. The presence of the filler results in

a thicker coating on the chip, typically

9.5

to l.Omm. The

increased stress on the die caused by the thicker coating

may be partially or completed offset by the lower thermal

coefficient of expansion of the filled epoxy relative to the

unfilled epoxy. Filled epoxies used for encapsulation are

similar to the semi-conductor grade molding compounds

used for plastic integrated circuit packages. Ionic impurity

levels are similar to molding compound and chloride levels

less than 20 ppm are available. The majority of filled

epoxies are anhydride hardened. As a result, they break-

down prematurely during pressure cooker testing, some-

times after 48 hours of testing.

24.8.1.3 Silicones

Several silicones are suitable for

encapsulation. The ionic contamination levels in the mate-

rials have been steadily reduced. Currently, chloride levels

5-25

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Licensed by Information Handling Services

COPYRIGHT Association Connecting Electronics Industries

Licensed by Information Handling Services

IPC-CM-770

Januaty

1996

D,

Defines

the

tape

width

or

format

(i.

e.

35mm,

or

48mm

or

70mm)

J

I

OZ

i

#1

IID

Area

NOTES:

1

All dimensions and tolerances conform

to

ANSI

Y14.5-1982

2

Datums A-B and

D

are

to

be determined where the center leads exlt the

body

3.

Contrdlmg dimensions are in inches.

4. D1

and

El

are the inner edges

of

the OLB

window

and are equlvaknt

to

the package

body

size: the area between

Dl

and

El

is user delInable.

5.

Tie

bar

feature shown

IS

opttonal.

IPC-I-

Figure

24-7

Registered Features for TAB Tape Outer-lead Bonding from

JEDEC

outline

UO-O17

less than

5

ppm are common. The applicability of silicones

is generally good. Heat curing is most common but several

UV curable silicones are available which may have advan-

tages in an in-line cure process. Typical cured thickness is

0.125 to 0.5mm. Alpha particle protection is good. The

UV-cured silicones are generally transparent. As a result

they may not be suitable for certain applications as many

companies are not interested in exposing the active side

of

the die to day or room light, or visual inspection (after pro-

cessing).

24.8.1.4 Polyimides

Ionically-clean polyimide resins

now boast chloride levels under

10

ppm. Polyimide mate-

rials are especially attractive when alpha-particle protection

is a priority. Polyimides are heat dried also. Pre-imidized

polyimides are preferred because the drying temperature is

lower than the monomeric materials. Typical coating thick-

ness is

0.05

to 0.25mm. Polyimides of interest to TAB are

siloxane modified. As such, they are delivered pre-cured,

5-26

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COPYRIGHT Association Connecting Electronics Industries

Licensed by Information Handling Services

January

1996

IPC-CM-770

and can be stored at room temperature for up to two years.

After encapsulation, the materials are dried to drive off the

solvent vehicle.

25.0 INTERMIXED TECHNOLOGY

Sections 21, 22, 23 and 24 cover the principles of compo-

nent mounting -where components are mounted through-

the-board and components are surface mounted. Intermix-

ing of the techniques on the same electronic assembly adds

an additional dimension to the aspects of component

mounting. Although the techniques used for through-hole

and surface mounting in intermixed assemblies are similar

to the approach used in “all the same type of mounting”

assemblies, there are many additional concerns facing the

assembler of printed boards who uses both technologies in

the same assembly.

25.1 General Considerations

Because of the dual or

multistep component mounting operation, the designer of

intermixed assemblies must take into account all of the

fabrication and assembly steps necessary to complete the

electronic assembly. These concerns that take place during

the design cycle include:

A. Component Types

B.

The Assembly Processes Used

Single-sided assembly

Double-side assembly

Component securing

C. Joining Techniques

Single-sided joining techniques

Double-sided joining techniques

Care required for heat-sensitive components

Handling of unsealed components

D. Sequence of Events

The last item on the list shown above is usually never con-

sidered during the design cycle; however, in intermixed

assemblies, if the sequencing of component mounting is

not taken into account, components will interfere with one

another or will be removed during a second mounting step.

25.1.1 LeadlLand Relationships

Hole and land require-

ments for intermixed assembly are identical to those

requirements already stipulated in through-the-board and

surface mounted land pattern configurations.

No

special

requirements are necessary and implementation of the

proper land pattern into the design will provide the appro-

priate solder joint after placement.

25.1.2 Component Preparation

All lead extension and

forming requirements on parts to be mounted on printed

board structures are identical to the techniques described

for through-the-board and surface mount component

mounting and positioning.

One major difference to be acknowledged is that some

individuals have chosen to reduce the number of compo-

nent mounting and attachment sequences by taking compo-

nents designed for through- the-board mounting and con-

verting them to surface mount parts; or parts that are

designed for surface mounting are converted to through-

the-board mounted parts.

Figure 25-1 shows the concept of taking a standard flat-

pack which is usually surface mounted and forming the

leads,

so

that the parts may be mounted through-the-board.

This would be a practice used when there are only several

flatpacks on an otherwise all through-mounted board

assembly.

Sockets are also used quite often as a technique for taking

components that are surface mounted and converting them

over to through-the-board mounted parts.

When components that have been designed for through-

the-board mounting are converted to surface mounting,

there are additional steps necessary in lead forming. Axial

leaded parts that are normally mounted through-the-board

would have their leads coined as shown in Figure 25-2A.

These parts would then be surface mounted. In addition,

some manufacturers have started to use the concept of a

dual inline with

I

beam leads. In this technique, dual inline

packages have their leads foreshortened and are surface

mounted to the board in the manner shown in Figure

25-2B. Special care must be taken to insure that the com-

ponents do not move during the soldering operations. Usu-

ally the solder paste is sufficient to hold a dual inline pack-

age in place prior to reflow soldering.

I

IPC-I-O0215

Figure 25-1 Component Modifications for Through-hole

Applications

25.1.3 Component Placement

Sophisticated tooling is

available, both for the placement of axial leaded compo-

nents and the place- ment of surface mounted components.

Figure 25-3 shows an example of the sequencing used for

plac- ing two leaded axial parts and a tape used to place

5-27

COPYRIGHT Association Connecting Electronics Industries

Licensed by Information Handling Services

COPYRIGHT Association Connecting Electronics Industries

Licensed by Information Handling Services