IPC J-STD-003B.pdf - 第10页

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6.1 Correction for Buoyancy ............................. 23
6.2 Preheat .......................................................... 23
6.3 Baking .......................................................... 23
6.4 Prebaking ..................................................... 23
6.5 Safety Note .................................................. 23
6.6 Use of Nonactivated Flux ........................... 23
6.7 Solder Contact ............................................. 23
APPENDIX A Calculation of Maximum
Theoretical Force for a
Rectangular Cross-Section
............ 24
APPENDIX B Calculation of Area Under
the Wetting Curve
........................... 25
APPENDIX C Informative Annex ........................... 26
APPENDIX D Test Protocol for Wetting
Balance Gauge Repeatability
and Reproducibility (GR&R)
Using Copper Foil Coupons
............. 27
APPENDIX E J-STD-002/J-STD-003 Activated
Solderability Test Flux Rationale
Committee Letter
............................. 28
Figures
Figure 3-1 Contact Angle ................................................... 3
Figure 3-2 Example Reticle ................................................ 5
Figure 4-1 Edge Dip Solderability Test .............................. 7
Figure 4-2 Suggested Test Specimen for Plated-
Through Holes .................................................. 8
Figure 4-3 Suggested Test Specimen for Surface
Mount Features ................................................ 8
Figure 4-4 Rotary Dip Test ................................................. 9
Figure 4-5 Effectiveness of Solder Wetting of
Plated-Through Holes - Class 3 ..................... 10
Figure 4-6 Examples of Solder Wetting of Plated-
Through Holes - Class 3 ................................ 10
Figure 4-7 Wetting Balance Apparatus ............................ 18
Figure 4-8 Suggested Wetting Balance Test
Specimens and Soldering Immersion ............ 18
Figure 4-9 Wetting Balance Test Soldering Immersion ... 19
Figure 4-10 Set A Wetting Curve ....................................... 20
Figure 4-11 Set B Wetting Curve ....................................... 20
Figure 5-1 Aid to Evaluation ............................................ 22
Tables
Table 1-1 Test Method Selection ......................................... 2
Table 1-2 Conditioning and Test Requirements .................. 3
Table 3-1 Flux Composition ................................................ 4
Table 3-2 Maximum Limits of Solder Bath Contaminant .... 5
Table 4-1 Stencil Thickness Requirements ....................... 12
Table 4-2 Reflow Parameter Requirements ...................... 12
Table 4-3 Stencil Thickness Requirements ....................... 17
Table 4-4 Lead-Free Reflow Parameter Requirements .... 17
Table 4-5 Wetting Balance Parameter and
Suggested Criteria ............................................ 19
Table 4-6 Wetting Balance Parameter and
Suggested Criteria ............................................ 21
March 2007 IPC J-STD-003B
vii
Copyright Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
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IPC J-STD-003B March 2007
viii
Copyright Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
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Solderability Tests for Printed Boards
1 GENERAL
1.1 Scope
This standard prescribes test methods, defect
definitions and illustrations for assessing the solderability
of printed board surface conductors, attachment lands, and
plated-through holes. This standard is intended for use by
both vendor and user.
1.2 Purpose The solderability determination is made to
verify that the printed board fabrication processes and sub-
sequent storage have had no adverse effect on the solder-
ability of those portions of the printed board intended to be
soldered. This is determined by evaluation of the solder-
ability test specimen portion of a board or representative
test specimen which has been processed as part of the
panel of boards and subsequently removed for testing per
the method selected.
1.3 Objective The objective of the solderability test
methods described in this standard is to determine the abil-
ity of printed board surface conductors, attachment lands,
and plated-through holes to wet easily with solder and to
withstand the rigors of the printed board assembly pro-
cesses.
1.3.1 Shall or Should The word shall is used in the
text of this document wherever there is a requirement for
materials, preparation, process control or acceptance of a
soldered connection or a test method. The word ‘should’
reflects recommendations and is used to reflect general
industry practices and procedures for guidance only.
1.3.2 Document Hierarchy In the event of conflict, the
following descending order of precedence applies:
1. Procurement as agreed between user and supplier.
2. Master drawing or master assembly drawing reflecting
the users detailed requirements.
3. When invoked by the customer or per contractual agree-
ment, this document, J-STD-003.
4. Other documents to extent specified by the customer.
1.4 Performance Classes Three general classes have
been established to reflect progressive increases in sophis-
tication, functional performance requirements and testing/
inspection frequency. It should be recognized that there
may be an overlap of equipment categories in different
classes. The user has the responsibility to specify in the
contract or purchase order the performance class required
for each product and shall indicate any exceptions to spe-
cific parameters, where appropriate.
Class 1 General Electronic Products
Includes consumer products, some computer and computer
peripherals suitable for applications where cosmetic imper-
fections are not important and the major requirement is
function of the completed printed board.
Class 2 Dedicated Service Electronic Products
Includes communications equipment, sophisticated busi-
ness machines, instruments where high performance and
extended life is required and for which uninterrupted ser-
vice is desired but not critical. Certain cosmetic imperfec-
tions are allowed.
Class 3 High Performance Electronic Products
Includes the equipment and products where continued per-
formance or performance on demand is critical. Equipment
downtime cannot be tolerated and must function when
required such as in life support items or flight control sys-
tems. Printed boards in this class are suitable for applica-
tions where high levels of assurance are required and ser-
vice is essential.
1.5 Method Classification This standard describes test
methods by which both the surface conductors (and attach-
ment lands) and plated-through holes may be evaluated for
solderability. Test A, Test B, Test C, Test D and Test E for
tin/lead solder processes and Test A1, Test B1, Test C1,
Test D1 and Test E1 for lead-free solder processes, unless
otherwise agreed upon between vendor and user. Test A
and Test C for tin/lead solder processes, Test A1 and Test
C1 for lead-free solder processes are to be used as a default
solderability tests.
Provisions are made for this determination to be performed
at the time of manufacture, at the receipt of the boards by
the user, or just prior to assembly and soldering. User and
vendor shall agree to the appropriate method to be used
and their correlation.
Standard dwell times are defined in some of the methods
called out in this standard. Variations in board heat capac-
ity may necessitate the use of longer solder dwell times
(see 6.2). Any change in solder dwell shall be agreed upon
by user and vendor.
1.5.1 Visual Acceptance Criteria Tests
Tin Lead Solder Alloy
Test A Edge Dip Test For surface conductors and
attachment lands only (see 4.2.1)
Test B Rotary Dip Test For plated-through holes, sur-
face conductors and attachment lands, solder source side
(see 4.2.2)
March 2007 IPC J-STD-003B
1
Copyright Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
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