IPC J-STD-003B.pdf - 第13页

Unless otherwise specified, the land associated with a plated-through hole shall be considered part of the plated- through hole if it is used for through-hole attachment. In this case, only tests for hole solderability ap…

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Test C Solder Float Test For plated-through holes, sur-
face conductors and attachment lands, solder source side
(see 4.2.3)
Test D Wave Solder Test For plated-through holes,
surface conductors and attachment lands, solder source side
(see 4.2.4)
Test E Surface Mount Simulation Test For surface
conductors and attachment lands (see 4.2.5)
Lead Free Solder Alloy
Test A1 Edge Dip Test For surface conductors and
attachment lands only (see 4.2.6)
Test B1 Rotary Dip Test For plated-through holes,
surface conductors and attachment lands, solder source side
(see 4.2.7)
Test C1 Solder Float Test For plated-through holes,
surface conductors and attachment lands, solder source side
(see 4.2.8)
Test D1 Wave Solder Test For plated-through holes,
surface conductors and attachment lands, solder source side
(see 4.2.9)
Test E1 Surface Mount Simulation Test For surface
conductors and attachment lands (see 4.2.10)
1.5.2 Force Measurement Criteria Tests
Tin Lead Solder Alloy
Test F Wetting Balance Test For plated-through holes,
surface conductors and attachment lands (see 4.3.1)
Lead Free Solder Alloy
Test F1 Wetting Balance Test For plated-through
holes, surface conductors and attachment lands (see 4.3.2)
Tests F and F1 shall not be used for acceptance/rejection
without user and vendor agreement. Please forward all test
data generated using these test methods, including type of
board tested (such as Type 2 or 12 layer, Type 3), dimen-
sions of test specimen tested, and any pretreatment, to:
IPC
Attn. J-STD-003 Staff Liaison
3000 Lakeside Drive, Suite 309S
Bannockburn, IL 60015
1.5.3 Test(s) Methodologies Under Committee Review
The J-STD-003 committee has undertaken, characterized,
and reviewed the use of the Sequential Electrochemical
Reduction Analysis (SERA® methodology for solderability
testing. The committee’s current position is that the
SERA® test method should reside within the IPC-TM-650
manual until additional solderability test information is
generated. Please forward all test data for committee
review to:
IPC
Attn. J-STD-003 Staff Liaison
3000 lakeside Drive, Suite 309S
Bannockburn, IL 60015
1.6 Test Method Selection For appropriate test selection
refer to 1.5 and Tables 1-1 and 1-2. The test selection
should consider the final soldering process so that the
results of the test will best represent that process.
1.7 Test Specimen Requirements The test specimen
shall be a representative test specimen, a portion of the
printed board being tested, or a whole board if within size
limits, such that an immersion depth defined in the indi-
vidual method is possible. The test specimen shall be rep-
resentative of the lot being tested. When this test specimen
is to be used as a criterion for material acceptance, the
number of test specimens shall be defined by agreement
between the user and vendor.
Test specimens that may be used for rigid board surface
solderability and plated-through hole solderability are
detailed in the paragraph sections under the individual test
methods. Similar test specimens may be used provided
they reflect the board circuitry, hole, and construction, and
have been processed in conjunction with the printed board
being evaluated.
Table 1-1 Test Method Selection
Test Method Applies to Surface Features Plated-Through Holes
Tests with Visual Assessment Criteria
A Edge Dip Test
A1 Edge Dip Test
X N/A
B Rotary Dip Test
B1 Rotary Dip Test
X (Solder Source Side Only) X
C Solder Float Test
C1 Solder Float Test
X (Solder Source Side Only) X
D Wave Solder Test
D1 Wave Solder Test
X (Solder Source Side Only) X
E Surface Mount Simulation Test
E1 Surface Mount Simulation Test
X N/A
Tests with Force Measurement Criteria
F Wetting Balance Test
F1 Wetting Balance Test
XX
IPC J-STD-003B March 2007
2
Copyright Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
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Unless otherwise specified, the land associated with a
plated-through hole shall be considered part of the plated-
through hole if it is used for through-hole attachment. In
this case, only tests for hole solderability apply. If the land
is used for surface attachment of parts, then such lands
shall be tested for both hole and surface solderability.
1.8 Coating Durability The user shall specify to the ven-
dor, as part of the purchase or ordering agreement, the
required coating durability. The following are guidelines
for determining the needed level of coating durability (not
product performance classes). Conditioning and solderabil-
ity testing shall be performed per Table 1-2.
Category 1 Minimum Coating Durability
Intended for boards which will be soldered within 30 days
from the time of manufacture and are likely to experience
minimum thermal exposures.
Category 2 Average Coating Durability
Intended for boards likely to experience storage up to six
months from the time of manufacture and moderate ther-
mal or solder exposures.
Category 3 Maximum Coating Durability
Intended for boards likely to experience long storage (over
six months) from the time of manufacture, severe thermal
or solder processing steps, etc. It should be recognized that
there may be a cost premium or delivery delay associated
with boards ordered to this durability level.
1.9 Limitation This standard shall not be construed as a
production soldering or tinning procedure for preparing or
soldering of printed boards or assemblies.
2 APPLICABLE DOCUMENTS
The following documents of the issue currently in effect
form a part of this standard to the extent specified herein.
2.1 Industry
2.1.1 IPC
1
IPC-T-50 Terms and Definitions
IPC-TM-650 Test Methods Manual
J-STD-005 Requirements for Soldering Pastes
J-STD-006 Requirements for Electronic Grade Solder
Alloys and Fluxed and Non-Fluxed Solid Solders for Elec-
tronic Soldering Applications
3 REQUIREMENTS
3.1 Terms and Definitions
The definition of terms shall
be in accordance with IPC-T-50. Terms that have been
repeated from IPC-T-50 for convenience are indicated by
an asterisk (*).
*Contact Angle, Soldering The angle of a solder fillet
that is enclosed between a plane that is tangent to the
solder/ basis-metal surface and a plane that is tangent to the
solder/ air interface (see Figure 3-1).
3.2 Materials
3.2.1 Solder
For tin/lead testing, the solder composition
shall be Sn60/Pb40, Sn62/Pb36/2Ag or Sn63/Pb37 per
J-STD-006. The composition of the solder, including con-
tamination levels, shall be maintained during testing per
3.5.2
The composition of the tin/lead solder paste to be used in
Test E shall be Sn60/Pb40 or Sn63/Pb37 for Sn/Pb per
J-STD-005, mesh size of -325/+500, flux type ROL1. The
solder paste shall meet the storage and shelf life require-
ments of the manufacturers specification.
For lead-free testing, the solder composition shall be
Sn96.5Ag3.0Cu0.5 (SAC305) per J-STD-006. Other lead-
free solder alloys may be used upon agreement between
user and vendor.
1. www.ipc.org
Table 1-2 Conditioning and Test Requirements
Pretest Conditioning Flux
Durability of Coating Rating
a
12
b
3
Surface Holes Surface Holes Surface Holes
8 Hours Conditioning (3.4.2) See 3.2.2 X
None See 3.2.2 X X X X
None Type
c
X
a. See 1.8.
b. Default Coating Rating.
c. Flux product used in the printed assembly process.
SOLDER
SMALL CONTACT
ANGLE
LARGE CONTACT
ANGLE
IPC-003b-3-1
Figure 3-1 Contact Angle
March 2007 IPC J-STD-003B
3
Copyright Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
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The composition of the lead-free solder paste to be used in
Test S1 shall be Sn96.5Ag3.0Cu0.5 (SAC305) per J-STD-
005, mesh size of -325/+500, flux type to be agreed upon
between user and vendor. The solder paste shall meet the
storage and shelf life requirements of the manufacturers’
specification. Other lead-free solder pastes may be used
upon agreement between user and vendor
3.2.2 Flux The flux for tin/lead solderability tests shall
be a standard activated rosin flux #1 having a composition
of 25% ± 0.5% by weight of colophony and 0.15% ±
0.01% by weight diethylammonium hydrochloride (CAS
660-68-4), in 74.85% ± 0.5% by weight of isopropyl alco-
hol (see Table 3-1).
The flux for lead-free solderability tests shall be standard
activated rosin flux #2 having a composition of 25% ±
0.5% by weight of colophony and 0.39% ± 0.01% by
weight diethylammonium hydrochloride (CAS 660-68-4),
in 74.61% ± 0.5% by weight of isopropyl alcohol (see
Table 3-1).
3.2.2.1 Flux Maintenance Standard activated rosin
fluxes #1 and #2 shall be covered when not in use and dis-
carded after eight hours or the flux shall be maintained to
a specific gravity of 0.843 ± 0.005 at 25±2°C[77±3.6
°F] and discarded after one week of use.
3.2.3 Flux Removal Material used for cleaning printed
boards after solderability testing and prior to solderability
evaluations shall be capable of removing visible flux resi-
dues.
3.3 Equipment The following criteria applies to all
methods and equipment (see APPENDIX C for a list of
equipment sources). Equipment that is specific to any of
the solderability test methods is described within the
method details.
3.3.1 Conditioning Equipment The conditioning equip-
ment shall be capable of maintaining the temperature and
humidity parameters specified in 3.4.2. The test specimens
shall be suspended so that no portion of the test specimen
is within 40 mm [1.57 in] of the test chamber walls. The
nonmetallic holders shall support the test specimens
between vertical to 45 ° angle during exposure. Care shall
be taken to not exceed the capacity of the conditioning
equipment. Excessive or improper loading will cause con-
densation of humidity on the surface of the test specimens.
3.3.2 Solder Pot/Bath A thermostatically controlled
static solder bath shall be used of adequate dimensions to
accommodate the test specimens. The solder bath shall
contain enough solder to maintain the temperature during
testing within the specified temperature limits (3.5.1) and
to prevent exceeding the contamination levels (3.5.2). The
wave solder pot temperature limits utilized for Test Method
D or Test Method D1 shall be defined by agreement
between the user and vendor. Precautions should be taken
to avoid solder pot/bath damage due to metal erosion when
using Lead-free solder alloys.
3.3.3 Optical Inspection Equipment All test methods
requiring visual inspection shall be capable of 10X magni-
fication (see individual test methods), and may be equipped
with reticles, or equivalent, for measurement, when appli-
cable. An example of a reticle is shown in Figure 3-2.
Shadowless lighting shall be used for proper inspection.
3.3.4 Dipping Equipment Solder dipping devices shall
be mechanical/electromechanical and capable of control-
ling the immersion/emersion rates dwell time and immer-
sion depth as specified in 4.2 to 4.3.
3.3.5 Timing Equipment Timing equipment shall be
automated and accurate to the limits of the test method.
3.4 Preparation for Testing
3.4.1 Test Specimen Preparation and Conditioning for
Test
Care shall be exercised to prevent contamination
(by grease, perspiration, etc.) of the surface to be tested.
When agreed upon between user and vendor, the test speci-
men to be tested may undergo other types of pretreatments
such as degreasing, aqueous cleaning, copper and solder
brightening, or baking.
The prescribed pretreatments should reproduce actual pro-
cessing of the printed boards up to the time of assembly
soldering (see 6.3). If conditioning is performed, prebaking
is not recommended.
3.4.2 Durability Conditioning All test specimens identi-
fied as requiring durability conditioning shall be subjected
to conditioning prior to solderability testing immediately
followed by a bake per 3.4.3. The durability test conditions
shall be 72 °C± 5 °C [162 °F ± 9 °F] and 85%± 3% Rela-
tive Humidity [RH]. The test specimens shall be exposed
for a test duration of eight hours ± 15 minutes.
3.4.3 Baking Immediately after conditioning and prior to
solderability testing, all boards shall be baked at 105 ± 5
°C [221 ± 9 °F] for 1 +1/-0 hours to remove surface mois-
ture and other volatiles. Test specimens shall be cooled to
room temperature prior to fluxing and testing.
Table 3-1 Flux Composition
Constituent
Composition by
Weight Percent
Flux #1 Flux #2
Colophony 25 ± 0.5 25 ± 0.5
Diethylammonium hydrochloride 0.15 ± 0.01 0.39 ± 0.01
Isopropyl Alcohol (IPA) Balance Balance
Weight of Chlorine as % of solids 0.2 0.5
Note: APPENDIX C: Informative Annex contains a listing of industry test
flux product sources.
IPC J-STD-003B March 2007
4
Copyright Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
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