forte_en.pdf - 第27页
Page 27 Z8F Fig.29: Z8F microcontroller I2C Memory Chips Fig.30: I2C memory chips 1) The programmer uses an int ernal 2.2kΩ pull-up resistor on the data wire (SDA) when working wit h an I2C devic e. Th is int ernal re…
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2) Signals used as ISP are listed in the table:
Microcontroller
ISP signal
Other signals
LPC1102
-
-
LPC11xx
PIO0_1
-
LPC11Cxx
PIO0_1
PIO0_3 = Log.1
LPC11Uxx, LPC13xx
PIO0_1
PIO0_3 = Log.0
LPC15xx
ISP_0
ISP_1 = Log.0
LPC17xx
P2.10
-
LPC18xx
P2_7
-
LPC5411x
PIO0_31
PIO0_4 = Log.1,
PIO1_6 = Log.0
Table11: ISP signal
C8051 and EFM8 with C2
interface
Fig.26: C8051 and EFM8 with C2 interface
HCS08
Fig.27: HCS08 microcontroller
1) At some devices the programming mode cannot be
entered using their RESET signal, then power-on
reset is used. The programmer cannot do the power-
on reset when UP is controlled using commandline
parameters and external supply voltage is to be
used, in such a case the user have to ensure that the
BKGD pin is in log. 0 during connection of the supply
voltage.
CH32V003
Fig.28: CH32V003 microcontroller
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Z8F
Fig.29: Z8F microcontroller
I2C Memory Chips
Fig.30: I2C memory chips
1) The programmer uses an internal 2.2kΩ pull-up
resistor on the data wire (SDA) when working with an
I2C device. This internal resistor can be disabled at
"FORTE programmer settings" window.
2) If the device to be programmed is 24LC(S)21A or
24LC(S)22A, its VCLK pin must be connected to VDD
during programming.
3) 34xx02 memory chips need “high” voltage at the A0
pin for commands protecting it against SWP and
CSWP recording. The “high” voltage is generated at
FORTE P pin, it must be connected to A0 pin in this
case. The memory chip A0, A1 and A2 pins must be
connected manually according to the selected
protection mode.
4) 34AA04 memory needs “high” voltage at the A0 pin
for configuration memory programming. The “high”
voltage is generated at FORTE P pin, it must be
connected to A0 pin in this case.
SPI Memory Chips
Fig.31: SPI memory chips
1) Some devices have WP, HOLD or RESET pins. All of
them must be connected to the required logic level in
such a way as not to block the communication or
device programming.
Different manufacturers mark the memory chips' SPI pins
with different names. Some of them are listed in the
following table:
Name on picture
Atmel, SST
ST
DI
SI
D
DO
SO
Q
CLK
SCK
C
CS
CS, CE
S
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QUAD SPI interface
Fig.32: QUAD SPI interface
1) It is recommended to use a flat ribbon cable and to
connect all its GND wires.
Microwire Memory Chips
Fig.33: Microwire memory chips
1) Pin L determines the memory organization as either
8-bits or 16-bits per word. The user selects the
required organization in the UP program and FORTE
then sets this pin to the corresponding logic level. If
this memory pin is firmly connected to the correct
logic level inside the application, pin L in the
programmer remains disconnected.
2) If used in combination with the M93Sx6 memory chip,
the programmer's L pin must be connected to the
device's PRE pin to serve for selecting the protection
register.
UNI/O Memory Chips
Fig.34: UNI/O serial memory chips
1-Wire Interface
Fig.35: Components with 1-WIRE interface
1) A Schottky diode is necessary only for devices
requiring higher than the power-supply voltage for
programming, such as DS2505 or DS2406, for
example. A pull-up resistor is needed in any case.