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© National Instruments Corporation 1-1 Mult ifunction Reconfigurable I/O User Manual 1 Introduction This chapter describes the concept and features of the Reconfigurable I/O (RIO) devices, optional software and equipment…
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© National Instruments Corporation 1-1 Multifunction Reconfigurable I/O User Manual
1
Introduction
This chapter describes the concept and features of the Reconfigurable I/O
(RIO) devices, optional software and equipment, and safety information.
About the Reconfigurable I/O Device
Table 1-1 lists an overview of the NI 78xx Multifunction Reconfigurable
I/O devices.
A user-reconfigurable FPGA (Field-Programmable Gate Array) controls
the digital I/O lines on the PCI/PXI-781x, and the digital and analog I/O
lines on the device. The FPGA on your device allows you to define the
functionality and timing of the device. You can change the functionality of
the FPGA on your device in LabVIEW using the LabVIEW FPGA Module
to create and download a custom virtual instrument (VI) to the FPGA.
Using the FPGA Module, you can graphically design the timing and
Table 1-1. NI 78xx devices Multifunction RIO Device Overview
Device I/O Channels FPGA AI Sample Rate
PCI/PXI-7811 160 DIO Virtex-II XC2V1000 —
PCI/PXI-7813 160 DIO Virtex-II XC2V3000 —
PCI/PXI-7830 4 AI, 4 AO, 56 DIO Virtex-II XC2V1000 200 kS/s
PCI/PXI-7831 8 AI, 8 AO, 96 DIO Virtex-II XC2V1000 200 kS/s
PCI/PXI-7833 8 AI, 8 AO, 96 DIO Virtex-II XC2V3000 200 kS/s
PCIe/PXI-7841 8 AI, 8 AO, 96 DIO Virtex-5 LX30 200 kS/s
PCIe/PXI-7842 8 AI, 8 AO, 96 DIO Virtex-5 LX50 200 kS/s
PCIe/PXI-7851 8 AI, 8 AO, 96 DIO Virtex-5 LX30 750 kS/s
PCIe/PXI-7852 8 AI, 8 AO, 96 DIO Virtex-5 LX50 750 kS/s
PXI-7853 8 AI, 8 AO, 96 DIO Virtex-5 LX85 750 kS/s
PXI-7854 8 AI, 8 AO, 96 DIO Virtex-5 LX110 750 kS/s
Chapter 1 Introduction
Multifunction Reconfigurable I/O User Manual 1-2 ni.com
functionality of your device. If you only have LabVIEW but not the FPGA
Module, you cannot create new FPGA VIs, but you can create VIs that run
on Windows or a LabVIEW Real-Time (RT) target to control existing
FPGA VIs.
Some applications require tasks such as real-time, floating-point
processing or datalogging while performing I/O and logic on the device.
You can use the LabVIEW Real-Time Module to perform these additional
applications while communicating with and controlling your device.
The device contains Flash memory to store a startup VI for automatic
loading of the FPGA when the system is powered on.
The device uses the Real-Time System Integration (RTSI) bus to easily
synchronize several measurement functions to a common trigger or timing
event. PCI devices access the RTSI bus through a RTSI cable connected
between devices. PXI devices access the RTSI bus through the PXI trigger
lines implemented on the PXI backplane.
Refer to the Multifunction Reconfigurable I/O Specifications, available at
ni.com/docs, for detailed device specifications.
Using PXI with CompactPCI
Using PXI-compatible products with standard CompactPCI products is an
important feature provided by PXI Hardware Specification Revision 2.1
and PXI Software Specification Revision 2.1. If you use a PXI-compatible
plug-in card in a standard CompactPCI chassis, you cannot use
PXI-specific functions, but you still can use the basic plug-in card
functions. For example, the RTSI bus on the R Series device is available
in a PXI chassis but not in a CompactPCI chassis.
The CompactPCI specification permits vendors to develop sub-buses that
coexist with the basic PCI interface on the CompactPCI bus. Compatible
operation is not guaranteed between CompactPCI devices with different
sub-buses nor between CompactPCI devices with sub-buses and PXI.
The standard implementation for CompactPCI does not include these
sub-buses. The device works in any standard CompactPCI chassis adhering
to the PICMG CompactPCI 2.0 R3.0 core specification.
PXI-specific features are implemented on the J2 connector of the
CompactPCI bus. Table 1-2 lists the J2 pins used by the PXI-78xx. The
NI 78xx is compatible with any CompactPCI chassis with a sub-bus that