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Chapter 1 Introduction © National Instruments Corporation 1-3 Mult ifunction Reconfigurable I/O User Manual does not dri ve these lines. Ev en if the sub-b us is capable of dri ving these lines, the device is still compa…
Chapter 1 Introduction
Multifunction Reconfigurable I/O User Manual 1-2 ni.com
functionality of your device. If you only have LabVIEW but not the FPGA
Module, you cannot create new FPGA VIs, but you can create VIs that run
on Windows or a LabVIEW Real-Time (RT) target to control existing
FPGA VIs.
Some applications require tasks such as real-time, floating-point
processing or datalogging while performing I/O and logic on the device.
You can use the LabVIEW Real-Time Module to perform these additional
applications while communicating with and controlling your device.
The device contains Flash memory to store a startup VI for automatic
loading of the FPGA when the system is powered on.
The device uses the Real-Time System Integration (RTSI) bus to easily
synchronize several measurement functions to a common trigger or timing
event. PCI devices access the RTSI bus through a RTSI cable connected
between devices. PXI devices access the RTSI bus through the PXI trigger
lines implemented on the PXI backplane.
Refer to the Multifunction Reconfigurable I/O Specifications, available at
ni.com/docs, for detailed device specifications.
Using PXI with CompactPCI
Using PXI-compatible products with standard CompactPCI products is an
important feature provided by PXI Hardware Specification Revision 2.1
and PXI Software Specification Revision 2.1. If you use a PXI-compatible
plug-in card in a standard CompactPCI chassis, you cannot use
PXI-specific functions, but you still can use the basic plug-in card
functions. For example, the RTSI bus on the R Series device is available
in a PXI chassis but not in a CompactPCI chassis.
The CompactPCI specification permits vendors to develop sub-buses that
coexist with the basic PCI interface on the CompactPCI bus. Compatible
operation is not guaranteed between CompactPCI devices with different
sub-buses nor between CompactPCI devices with sub-buses and PXI.
The standard implementation for CompactPCI does not include these
sub-buses. The device works in any standard CompactPCI chassis adhering
to the PICMG CompactPCI 2.0 R3.0 core specification.
PXI-specific features are implemented on the J2 connector of the
CompactPCI bus. Table 1-2 lists the J2 pins used by the PXI-78xx. The
NI 78xx is compatible with any CompactPCI chassis with a sub-bus that
Chapter 1 Introduction
© National Instruments Corporation 1-3 Multifunction Reconfigurable I/O User Manual
does not drive these lines. Even if the sub-bus is capable of driving these
lines, the device is still compatible as long as those pins on the sub-bus are
disabled by default and are never enabled.
Caution Damage can result if the J2 lines are driven by the sub-bus.
Overview of Reconfigurable I/O
This section explains reconfigurable I/O and describes how to use the
LabVIEW FPGA Module to build high-level functions in hardware.
Refer to Chapter 2, Hardware Overview of the NI 78xx, for descriptions of
the I/O resources on the NI 78xx.
Reconfigurable I/O Concept
Multifunction Reconfigurable I/O devices are based on a reconfigurable
FPGA core surrounded by fixed I/O resources for analog and digital input
and output. You can configure the behavior of the reconfigurable FPGA to
match the requirements of the measurement and control system. You can
implement this user-defined behavior as an FPGA VI to create an
application-specific I/O device.
Table 1-2. Pins Used by the NI 78xx
PXI-78xx Signal PXI Pin Name PXI J2 Pin Number
PXI_Trig<0..7> PXI Trigger<0..7> A16, A17, A18, B16, B18, C18, E16, E18
PXI_Clk10 PXI Clock 10 MHz E17
PXI_Star PXI Star Trigger D17
PXI_Lbl<0..12>
*
LBL<0..12> A1, A19, C1, C19, C20, D1, D2, D15, D19,
E1, E2, E19, E20
PXI_Lbr<0..12>
*
LBR<0..12> A2, A3, A20, A21, B2, B20, C3, C21,
D3, D21, E3, E15, E21
*
PXI-781x/783x only
Chapter 1 Introduction
Multifunction Reconfigurable I/O User Manual 1-4 ni.com
Flexible Functionality
Flexible functionality allows the device to match individual application
requirements and to mimic the functionality of fixed I/O devices. For
example, you can configure a device in one application for three 32-bit
quadrature encoders and then reconfigure the device in another application
for eight 16-bit event counters.
You also can use the device with the LabVIEW Real-Time Module in
timing and triggering applications, such as control and
hardware-in-the-loop (HIL) simulations. For example, you can configure
the device for a single timed loop in one application and then reconfigure
the device in another application for four independent timed loops with
separate I/O resources.
User-Defined I/O Resources
You can create your own custom measurements using the fixed I/O
resources. For example, one application might require an event counter that
increments when a rising edge appears on any of three digital input lines.
With a PCI/PCIe/PXI-783x/784x/785x device, another application might
require a digital line to be asserted after an analog input exceeds a
programmable threshold. You can implement these behaviors in the
hardware for fast, deterministic performance.
Device-Embedded Logic and Processing
You can implement LabVIEW logic and processing in the FPGA of your
device. Typical logic functions include Boolean operations, comparisons,
and basic mathematical operations. You can implement multiple functions
efficiently in the same design, operating sequentially or in parallel. You
also can implement more complex algorithms such as control loops. You
are limited only by the size of the FPGA.