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Chapter 1 Introduction © National Instruments Corporation 1-5 Mult ifunction Reconfigurable I/O User Manual Reconfigurable I/O Architecture Figure 1-1 shows an FPGA connected to fixed I/O resources and a bus interface. T…
Chapter 1 Introduction
Multifunction Reconfigurable I/O User Manual 1-4 ni.com
Flexible Functionality
Flexible functionality allows the device to match individual application
requirements and to mimic the functionality of fixed I/O devices. For
example, you can configure a device in one application for three 32-bit
quadrature encoders and then reconfigure the device in another application
for eight 16-bit event counters.
You also can use the device with the LabVIEW Real-Time Module in
timing and triggering applications, such as control and
hardware-in-the-loop (HIL) simulations. For example, you can configure
the device for a single timed loop in one application and then reconfigure
the device in another application for four independent timed loops with
separate I/O resources.
User-Defined I/O Resources
You can create your own custom measurements using the fixed I/O
resources. For example, one application might require an event counter that
increments when a rising edge appears on any of three digital input lines.
With a PCI/PCIe/PXI-783x/784x/785x device, another application might
require a digital line to be asserted after an analog input exceeds a
programmable threshold. You can implement these behaviors in the
hardware for fast, deterministic performance.
Device-Embedded Logic and Processing
You can implement LabVIEW logic and processing in the FPGA of your
device. Typical logic functions include Boolean operations, comparisons,
and basic mathematical operations. You can implement multiple functions
efficiently in the same design, operating sequentially or in parallel. You
also can implement more complex algorithms such as control loops. You
are limited only by the size of the FPGA.
Chapter 1 Introduction
© National Instruments Corporation 1-5 Multifunction Reconfigurable I/O User Manual
Reconfigurable I/O Architecture
Figure 1-1 shows an FPGA connected to fixed I/O resources and a bus
interface. The fixed I/O resources include A/D converters (ADCs),
D/A converters (DACs), and digital I/O lines.
Figure 1-1. High-Level FPGA Functional Overview
Software accesses the device through the bus interface, and the FPGA
connects the bus interface and the fixed I/O to make possible timing,
triggering, processing, and custom I/O measurements using the LabVIEW
FPGA Module.
The FPGA logic provides timing, triggering, processing, and custom I/O
measurements. Each fixed I/O resource used by the application uses a small
portion of the FPGA logic that controls the fixed I/O resource. The bus
interface also uses a small portion of the FPGA logic to provide software
access to the device.
The remaining FPGA logic is available for higher-level functions such as
timing, triggering, and counting. The functions use varied amounts of logic.
You can place useful applications in the FPGA. How much FPGA space
your application requires depends on your need for I/O recovery, I/O, and
logic algorithms.
FPGA
Bus Interface
Fixed I/O Resource
Fixed I/O Resource
Fixed I/O Resource
Fixed I/O Resource
Chapter 1 Introduction
Multifunction Reconfigurable I/O User Manual 1-6 ni.com
The FPGA does not retain the VI when the device is powered off, so you
must reload the VI each time you power on the device. You can load the VI
from onboard Flash memory or from software over the bus interface. One
advantage to using Flash memory is that the VI can start executing almost
immediately after power up, instead of waiting for the computer to
completely boot and load the FPGA VI. Refer to the LabVIEW Help for
more information about how to store your VI in Flash memory.
Reconfigurable I/O Applications
You can use the LabVIEW FPGA Module to create or acquire new VIs
for your application. The FPGA Module allows you to define custom
functionality for your device using a subset of LabVIEW functionality.
Refer to the examples, available in LabVIEW by selecting Help»Find
Examples, and then selecting Hardware Input and Output»R Series, for
examples of FPGA VIs.
Software Development
You can use LabVIEW with the LabVIEW FPGA Module to program your
device. To develop real-time applications that control your device, use
LabVIEW with the LabVIEW Real-Time Module.
LabVIEW FPGA Module
The LabVIEW FPGA Module enables you to use LabVIEW to create VIs
that run on the FPGA of the R Series target device. Use the FPGA Module
VIs and functions to control the I/O, timing, and logic of your device and
to generate interrupts for synchronization. Select Help»Search the
LabVIEW Help to view the LabVIEW Help. In the LabVIEW Help, use the
Contents tab to browse to the FPGA Interface book for more information
about the FPGA Interface functions.
You can use Interactive Front Panel Communication to communicate
directly with the FPGA VI running on the FPGA target. You can use
Programmatic FPGA Interface Communication to programmatically
control and communicate with FPGA VIs from host VIs.
Use the FPGA Interface functions when you target LabVIEW for Windows
or an RT target to create host VIs that wait for interrupts and control the
FPGA by reading and writing the FPGA VI running on your device.