MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS.pdf - 第636页
MIL-STD-883F METHOD 5006 20 November 1969 4 4. SUMMARY . The f ollowing det ails shall be speci fied i n the applic able ac quisi tion doc ument: a. Test condit ion let ter ( see 3.1 and 3. 2). b. Test sequence and s amp…
MIL-STD-883F
METHOD 5006
20 November 1969
3
Step Test condition Plane
1 E Y
2
, X
1
, Z
1
, Y
1
2 F Y
2
, X
1
, Z
1
, Y
1
3 G Y
2
, X
1
, Z
1
, Y
1
4 H Y
2
, X
1
, Z
1
, Y
1
Electrical parameter measurements (see 1.2) shall be made after each plane, and the number of failures incurred shall be
recorded.
3.1.5 Step-stress operational life
. The purpose of this test is to establish the operational stress levels that will accelerate
predominant failure mechanisms so that meaningful failures can be generated in a relatively short period of time. The
results of the testing will also be utilized to evaluate the safety factors built into the device, to establish the safe constant
operational stress conditions, and to improve through corrective action(s) the reliability of the device. Electrical parameter
measurements shall be made after each stress level and the number of failures incurred in each step shall be recorded.
3.1.6 Constant high-stress operational life
. The purpose of this test is to induce meaningful operational failures in a
relatively short period of time and to compare the results of this testing with the results obtained from the step-stress
operational life. The stress level to be applied and intervals to intermediate electrical measurements shall be determined on
the basis of the results obtained in the step-stress tests (see 3.1.5). Electrical parameter measurements shall be made after
each specified time interval and the number of failures shall be recorded.
3.1.7 Step-stress storage life
. The purpose of this test is to establish the storage stress levels that will accelerate
predominant failure mechanisms so that meaningful failures can be generated in a relatively short period of time. The
storage temperatures and the step duration shall be established prior to initiation of testing. The results of the testing will be
utilized to evaluate the maximum limits of device resistance to failure at high temperature. Electrical parameter
measurements shall be made after each stress level and the number of failures incurred at each level shall be recorded.
3.2 Test condition B. Procedure for film and hybrid microcircuits
. Limit test shall be conducted in accordance with table I
and as described in 3.1.1 through 3.1.7 except that the specified test condition may be changed. When test condition or
stress levels are changed, they shall be established prior to the initiation of test. Failure analysis of all devices failing limit
tests shall be performed in accordance with method 5003, test condition B, unless otherwise specified in the applicable
acquisition document. Unless otherwise specified in the applicable acquisition document, limit testing in any test may be
discontinued after 50 percent of test sample has failed that specific test.
3.3 Test plan
. When required by the applicable acquisition document, the specific procedures for conducting limit testing
shall be submitted as a "Limit Test Plan" for approval by the acquiring activity prior to the initiation of testing. This plan shall
include the following as a minimum:
a. Activity responsible for performing the test.
b. Device types to be subjected to limit testing and criteria for their selection.
c. Failure criteria including electrical parameters to be measured.
d. Testing schedule.
e. Description of testing equipment.
f. Test condition if other than specified.
g. Data recording and reporting formats.
h. Data analysis procedures.
MIL-STD-883F
METHOD 5006
20 November 1969
4
4. SUMMARY. The following details shall be specified in the applicable acquisition document:
a. Test condition letter (see 3.1 and 3.2).
b. Test sequence and sample quantities if other than specified (see 3.1 and 3.2).
c. Failure analysis procedures and test condition, if other than specified (see 3.1 and 3.2).
d. For test condition B, the test conditions and stress levels, where applicable (see 3.2).
e. Percent failure for test termination, if other than specified (see 3.1 and 3.2).
f. Requirements for Limit Test Plan and data reporting (see 3.3).
MIL-STD-883F
METHOD 5007.6
19 August 1994
1
METHOD 5007.6
WAFER LOT ACCEPTANCE
1. PURPOSE
. This method establishes the requirements for the lot acceptance testing of microcircuit wafers intended for
class level S use.
2. APPARATUS
. The apparatus used shall be in accordance with the apparatus requirements of the methods specified
in the conditions column of table I.
3. PROCEDURE
. The performance of the wafer lot acceptance tests shall be in accordance with the conditions specified
in table I. If a lot fails a test under the sampling plan, as an alternative to rejecting the entire lot, the manufacturer may elect
to test each wafer in the lot for that parameter(s). All wafers successfully passing the test(s) shall be considered the lot for
the remainder of the tests. All wafers failing any test shall be removed from the lot. Data obtained from all tests shall be
recorded. The sequence of the tests in table I does not have to be adhered to, however, the tests must be performed at the
point in the processing (if specified) required in the conditions column of table I. Where limits are based on tolerances about
an "approved design nominal", the nominal shall be stated in the maintenance plan submitted for approval to the qualifying
or acquiring activity. Where table I limits are based on tolerances about the "mean", the mean shall be determined initially
on measurements from a minimum of five lots and the mean shall be stated in the maintenance plan submitted for approval
to the qualifying or acquiring activity. In no case shall the "design nominal" or "mean" exceed the absolute limits specified in
table I.
4. SUMMARY
. The following detail shall be specified in the applicable device specification:
Requirements or limits if other than those on table I.