IPC-D-859.pdf - 第20页

6. Keep heat sensitive and heat radiating components as far apart as possible (incorporate heat sinks whenever necessary). 3.4.5.3 Conductor Spacing In high frequency analog and high speed digital circuits, a minimum of …

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7. Provide test points to appropriate conductors in untest-
able circuits.
8. The maximum unterminated line length for a high
speed digital circuit is given by:
l
mw
=
t
r
2t pd
where:
t
r
= rise time (10–90%) in nanoseconds
t pd = propagation delay (see Table 3–2)
9. Provide wrap-a-round test capability of resistors.
10. Provide test points to control lines in memory circuits
for off-line testing.
3.4.5.2 Analog Circuits Analog circuits are usually
made from discrete devices, and provide the wave-form
characteristics necessary to describe a circuit. Standard dis-
crete components (resistors, capacitors, diodes, transistors,
etc.), as well as power transformers, coils and chokes, are
usually the types of components used for analog circuits.
Some of the rules to be followed when designing analog
printed board assemblies are:
1. Always determine correct polarity of the component, if
applicable.
2. Transistor emitter/base and collector should be prop-
erly identified (ground transistor case where appli-
cable).
3. The maximum allowable lead length for analog signal
interconnections shall be in the order of:
l
MAX
=
λ
8
mm [inch]
where: λ = signal wave length in mm [inches]
In instances where line lengths approach maximum, an
evaluation shall be made to insure that excessive
impedance mismatches that may result will not
adversely affect electrical performance.
4. If different grounds are used, keep grounding busses as
far away as possible.
5. As opposed to digital signals, analog design should
have signal traces considered first, as ground planes, or
ground conductors can be used to complete circuit con-
nections.
IPC-859-3-10
Figure 3–10 Power and ground planes along with conductor areas exceeding 6.45 square mm [0.01 square inch] (0.38
mm [0.015 inch] conductors and 0.25 mm [0.010 inch] spacing on a 0.64 mm [0.025 inch] grid [CAD]).
POWER OR
GROUND PLANE
PAD
SPACES
VIA
0.25 MM X 0.25 MM
[0.010 INCH X 0.010 INCH]
0.38 MM [0.015 INCH] X
0.38 MM [0.015 INCH]
0.89 MM [0.035 INCH] 
SQUARE PAD COVERING
4 SPACES
PROVIDES A 1.65 MM 
[0.065 INCH]
SQUARE SOLID AREA
NOTE:
For via contact to copper gridded power or ground plane, via should terminate 
on a square solid conductor area of 1.,65 mm x 1.65 mm [0.065 inch x 0.065 inch].
December 1989 IPC-D-859
13
6. Keep heat sensitive and heat radiating components as
far apart as possible (incorporate heat sinks whenever
necessary).
3.4.5.3 Conductor Spacing In high frequency analog
and high speed digital circuits, a minimum of one line
width shall be maintained as spacing between any two
adjacent signal conductors. Very critical signals shall have
line width and spaces or shielding as required to insure
sufficient isolation and to minimize noise coupling as
specified.
3.5 Thermal Requirement Considerations Hybrid elec-
tronic technology is capable of performing within the tem-
perature range of –55° to +125°C. In fact, the basic thick-
film technology can perform satisfactorily at temperatures
significantly beyond this range. The limiting factor is most
often the performance of the attached active components or
the inherent power dissipation of the circuit.
Power dissipation has a major influence on circuit parti-
tioning and ultimate package size. Also, all material and
component operating capabilities are limited by inherent
maximum operating temperatures, above which their per-
formance may either degrade seriously or catastrophic fail-
ure may occur. With semiconductors, this temperature is
usually specified in terms of a maximum junction tempera-
ture. For other components, the maximum body tempera-
tures and hot-spot temperatures are commonly used as the
figures of merit.
In any case, the maximum operating temperature of an
electronic material or component is a direct result of the
electrical power dissipated in the element and/or the tem-
perature and heat-transfer characteristics of the environ-
ment associated with the component. All components,
especially resistors and active devices, will dissipate heat
in the performance of their normal electrical function.
Therefore, the problem is to remove the heat as quickly as
possible to prevent temperature rises within the heat-
generating elements.
Because of their small size and high component densities,
microcircuits are subject to high power densities and poor
heat transfer capabilities. As a result, thermal power den-
sity, rather than component density, may be the limiting
factor in certain microcircuit designs.
Thermal design considerations and thermal analysis tech-
niques are very important steps in the design cycle. There-
fore, the hybrid designer should have a thorough knowl-
edge of thermal design guidelines, the thermal properties of
materials, thermal analysis techniques and the thermal
evaluation of thick-film circuits.
Table 3–2 Conductor Electrical Parameters (10 Mil wide Conductors, Experimental Results)
Configuration Parameter Units* Gold System** Copper System***
Microstrip
z0.152 mm [0.006]
Dielectric
Thickness (h)
C
R
tpd
Z
0
S
21
E
R
0.311
0.015
0.0079
33.30
–7.20
5.70
0.220
0.014
0.0079
43.40
–5.87
3.30
Microstrip
z0.152 mm [0.006]
Dielectric
Thickness (h)
C
R
tpd
Z
0
S
21
E
R
0.185
0.015
0.0079
46.20
–5.93
5.20
0.141
0.015
0.0075
62.30
–5.31
2.90
Stripline
z0.305 mm [0.012]
Dielectric
Thickness (h)
t ≅ 0.0127 mm
[0.0005]
C
R
tpd
Z
0
S
21
E
R
0.295
0.015
0.0087
35.50
–5.91
5.30
0.202
0.0122
0.0079
46.10
–4.94
2.80
Unsymmetrical
Stripline
z0.2286 mm [0.009]
Dielectric
Thickness (h)
t ≅ 0.0127 mm
[0.0005]
C
R
tpd
Z
0
S
21
E
R
0.370
0.0106
0.0087
30.00
–6.47
4.80
0.276
0.0106
0.0083
36.20
–5.31
2.50
*C (Capacitance) pF/mm; R (Resistance) Ohm/mm; t pd (Propagation Delay) ns/mm;
Z
0
(Characteristic Impedance) Ohms; S
21
(Forward Transmission Loss at 300 MHz) dB;
E
R
(Apparent Dielectric Constant—estimated from Z
0
)
**Solid ground and voltage planes used for Gold System
***Gridded ground and voltage planes (0.38 mm lines and spaces) used for Copper System
IPC-D-859 December 1989
14
IPC-859-3-11
Figure 3–11 Flip-flop testability
IPC-859-3-12
Figure 3–12 Master clear for counters
December 1989 IPC-D-859
15