IPC-D-859.pdf - 第9页

Bond envelope The range of bonding parameters over which acceptable bonds may be formed. Bond interface The interface between the lead and the material to which it was bonded on the substrate. Bond lift-of f The failure …

IPC-HM-860 Speciﬁcation for Multilayer Hybrid Circuits

2.2 Government Documents

2.2.1 Military

MIL-C-14450

Copper Plating (Electro-deposited)

MIL-M-38510 General Speciﬁcation for Microelectronics

MIL-G-45204 Gold Plating (Electro-deposited)

MIL-P-81728 Plating, Tin-Lead (Electro-deposited)

MIL-STD-883 Test Methods and Procedures for Microelec-

tronics

2.2.2 Federal

QQ-N-290

Nickel Plating (Electro-deposited)

QQ-S-571 Solder; Tin Alloy; Lead-Tin Alloy; and Lead

Alloy

2.3 Other Publications

2.3.1 ASTM

F72

Gold Wire for Semiconductor Lead Bonding

F 487 Fine Aluminum—1% Silicon Wire for Semicon-

ductor Lead Bonding

F 638 Fine Aluminum—1% Magnesium Wire for Semi-

conductor Lead Bonding

2.3.2 EIA

JEDEC Publication 95

Registered and Standard Outlines

for Solid State Products

3.0 DESIGN CONSIDERATIONS

The information contained in this document describes gen-

eral and speciﬁc requirements for the design of thick ﬁlm

multilayer hybrid circuits intended to meet the performance

and end product requirements of IPC- HM-860.

The success or failure of a hybrid design depends on many

interrelated considerations. The effect of the following

parameters on the design should be considered:

1. Equipment environmental conditions, such as ambient

temperature, heat generated by the components, and

ventilation.

2. Maintenance philosophy during the service life of the

equipment, especially with respect to component

placement that affects component accessibility.

3. Spacing between circuits particularly ‘‘mother board/

daughter board’’ designs that might affect placement on

interconnecting lead frames.

4. Testing/fault location requirements that might affect

component placement, conductor routing, connector

contract allocations, etc.

5. If an assembly is to be repairable, consideration must

be given to component/circuit density and the selection

of board/conformal coating materials. In general,

design should promote ease of package repair which

must be initiated by delidding.

3.1 Terms and Definitions Deﬁnitions of all terms used

herein shall be as speciﬁed in IPC-T-50 and as follows.

Abrasive trimming Trimming a ﬁlm resistor to its nomi-

nal value by notching resistor with a ﬁnely adjusted stream

of an abrasive material, such as aluminum oxide, directly

against the resistor surface.

Active trim Trimming of a circuit element (usually a

resistor) in a circuit that is electrically activated and oper-

ating to obtain a speciﬁed functional output for the circuit

(see Functional trimming).

Add-on component Discrete or integrated prepackaged or

chip components that are attached to a ﬁlm circuit to com-

plete the circuit functions.

Analog circuits Circuits that provide a continuous (vs.

discontinuous) relationship between the input and output.

Aspect ratio The ratio between the length of a ﬁlm resis-

tor and its width; equal to the number of squares of the

resistor.

Back bonding Bonding active chips to the substrate

using the back of the chip, leaving the face, with its cir-

cuitry face up. The opposite of back bonding is face down

bonding.

Back mounting See Back bonding.

Ball bond A bond formed when a ball shaped end inter-

connecting wire is deformed by thermo-compression

against a metallized land; also called ‘‘a nail head bond’’

from the appearance of the ﬂattened ball.

Beam lead A long structural member not supported

everywhere along its length and subject to the forces of

ﬂexure, one end of which is permanently attached to a chip

device and the other end intended to be bonded to another

material, providing an electrical interconnection or

mechanical support or both.

Beam lead device An active or passive chip component

possessing beam leads as its primary interconnection and

mechanical attachment means to a substrate.

Bond An interconnection which performs a permanent

electrical and/or mechanical function.

Bond deformation The change in the form of the lead

produced by the bonding tool, causing plastic ﬂow, in mak-

ing the bond.

IPC-D-859 December 1989

Bond envelope The range of bonding parameters over

which acceptable bonds may be formed.

Bond interface The interface between the lead and the

material to which it was bonded on the substrate.

Bond lift-off The failure mode whereby the bonded lead

separates from the surface to which it was bonded.

Bond off See Bond lift-off.

Bond land See Bonding area.

Bond schedule The values of the bonding machine

parameters used when adjusting for bonding. For example,

in ultrasonic bonding, the values of the bonding force,

time, and ultrasonic power.

Bond separation The distance between the attachment

point of the ﬁrst and second bonds of a wire bond.

Bond site The portion of the bonding areas where the

actual bonding took place (see Bonding area).

Bond strength In wire bonding, the pull force at rupture

of the bond interface measured in the unit gram-force.

Bond surface See Bonding area.

Bond-to-bond distance The distance measured from the

bonding site on the die to the bond impression on the post,

substrate land, or ﬁngers, which must be bridged by a

bonding wire or ribbon.

Bond-to-chip distance In beam lead bonding the distance

from the heel of the bond to the component.

Bond tool The instrument used to position the lead(s)

over the desired bonding area and impart sufficient energy

to the lead(s) to form a bond.

Bondability Those surface characteristics and conditions

of cleanliness of a bonding area which must exist in order

to provide a capability for successfully bonding an inter-

connection material by one of several methods, such as

ultrasonic or thermo-compression wire bonding.

Bonding, die Attaching the semiconductor chip to the

substrate, either with an epoxy, eutectic or solder alloy.

Bonding area The area, deﬁned by the extent of a metal-

lization land or the top surface of the terminal, to which a

lead is or will be bonded.

Bonding island Same as Bonding land.

Bonding land A metallized area at the end of a thin

metallic strip to which a connection is to be made.

Bonding wire Fine gold or aluminum wire for making

electrical connections in hybrid circuits between various

bonding lands on the semiconductor device substrate and

device terminals or substrate lands.

BTAB The acronym for tape automated bonding when

the raised bump for each bond site is prepared on the tape

material as opposed to the bump being on the component.

Bugging height The distance between the hybrid sub-

strate and the lower surface of the beam lead device which

occurs because of deformation of beam leads during beam

lead bonding.

Chip The uncased and normally leadless form of an elec-

tronic component part, either passive or active, discrete or

integrated. chip-and-wire. A hybrid technology employing

face-up-bonded chip devices exclusively, interconnected to

the substrate conventionally (i.e. by ﬂying wires).

Chip carrier A special type of enclosure or package used

to house a semiconductor device or a hybrid microcircuit

which has metallized electrical terminations around its

perimeter rather than an extended lead frame or plug-in

pins.

Chopped bond Those bonds with excessive deformation

such that the strength of the bond is greatly reduced.

Co-ﬁring Processing the thick-ﬁlm conductors and resis-

tors through the ﬁring cycle at the same time.

Contact angle The angle made between the bonding

material and the bonding land.

Coplanar leads (ﬂat leads) Ribbon-type leads extending

from the sides of the circuit package, all lying in the same

plane.

Cratering Defect in which a portion of chip under the

ultrasonic bond is torn loose, leaving a pit, by excessive

amount of energy transmitted through the wire bond.

Die An uncased discrete or integrated device obtained

from a semiconductor wafer (see Chip).

Die bond Attachment of a die or chip to the hybrid sub-

strate.

Dielectric Materials that do not conduct electricity and

that are used for making capacitors, for insulating conduc-

tors (as in crossover and multilayer circuits), and for encap-

sulating circuits.

Digital circuits Applied normally for switching applica-

tions where the output of the circuit normally assumes one

or two states (binary operation); however, three state opera-

tion is possible.

Direct contact A contact made to the semiconductor die

when the wire is bonded directly over the part to be elec-

trically connected, as opposed to the expanded contact.

Doping The addition of an impurity to a semiconductor

to alter its conductivity.

Face bonding The opposite of back bonding. A face

bonded semiconductor chip is one that has its circuitry side

facing the substrate. Flip-chip and beam lead bonding are

the two common face bonding methods.

Field trimming Trimming of a resistor to set an output

voltage, current, etc.

December 1989 IPC-D-859

Film Single or multiple layers of coatings of thin or thick

material used to form various elements (resistors, capaci-

tors, inductors) or interconnections and crossovers (con-

ductors, insulators). Thick ﬁlms are deposited by screen

printing.

Film conductor A conductor formed in place on a sub-

strate by depositing a conductive material by screening,

plating, or evaporation techniques.

Film network An electrical network composed of a thin

and/or thick ﬁlm components and interconnections depos-

ited on a substrate.

Final seal The manufacturing operation that completes

the enclosure of the hybrid microcircuit so that further

internal processing cannot be performed without delidding

or disassembling the package.

Fire The term used to describe the act of heating a thick-

ﬁlm circuit so that the resistors, conductors, capacitors,

etc., will be transformed into their ﬁnal form.

Firing sensitivity Refers to the percentage change caused

in the ﬁred ﬁlm characteristics due to a change in peak ﬁr-

ing temperature. The ﬁring sensitivity is expressed in units

of %/°C.

Flip chip A leadless, monolithic structure, containing cir-

cuit elements, which is designed to electrically and

mechanically interconnect to the hybrid circuit by means of

an appropriate number of bumps located on its face which

are covered with a conductive bonding agent.

Flip-chip mounting A method of mounting ﬂip chips on

thick or thin ﬁlm circuits without the need for subsequent

wire bonding.

Functional trimming Trimming a circuit element (usu-

ally resistors) on an operating circuit to set a voltage or

current on the output. (See Active trim)

Glassivation A method of semiconductor passivation by

coating the element with a pyrolytic glass deposition.

Header The base of a hybrid circuit package that holds

the leads.

Hybrid circuit A microcircuit consisting of elements

which are a combination of the ﬁlm circuit type and the

semiconductor circuit type, or a combination of one or both

of these types and may include discrete add-on compo-

nents.

Hybrid group (electrically and structurally similar cir-

cuits). Hybrid microcircuits which are designed to perform

the same type(s) of basic circuit function(s), for the same

supply, bias, and single voltages and for input-output com-

patibility with each other under an established set of load-

ing rules, and which are enclosed in packages of the same

construction and outline.

Hybrid integrated circuit A microcircuit including thick

ﬁlm or thin ﬁlm paths and circuit elements on a supporting

substrate, to which active and passive micro-devices are

attached, either prepackaged or in uncased form as chips,

usually all enclosed in a suitable package (hermetic or

epoxy type). Used interchangeably with hybrid circuit and

hybrid integrated circuit.

Hybrid microcircuit A microcircuit that involves an insu-

lating substrate on which are deposited networks, consist-

ing generally of conductors, resistors, and capacitors, and

to which are attached discrete semiconductor devices

and/or monolithic integrated circuits and/or passive ele-

ments to form a packaged assembly. Used interchangeably

with hybrid circuit and hybrid integrated circuit.

Integrated circuit A microcircuit (monolithic) consisting

of interconnected elements inseparably associated and

formed in place on or within a single substrate (usually

silicon) to perform an electronic circuit function.

Junction (1) in solid state materials, a region of transi-

tion between p- and n- type semiconductor material as in a

transistor or diode. (2) A contact between two dissimilar

metals or materials (e.g., in a thermocouple or rectiﬁer). (3)

A connection between two or more conductors or two or

more sections of a transmission line.

Junction temperature The temperature of the region of

transition between the p- and n-type semiconductor mate-

rial in a transistor or diode element.

Land A portion of a conductive pattern usually used for

electrical connection, component attachment, or both.

Layer One of several ﬁlms in a multiple ﬁlm structure on

a substrate.

L cut A trim notch in a ﬁlm resistor that is created by the

cut starting perpendicular to the resistor length and turning

90° to complete the trim parallel to the resistor axis thereby

creating an L-shaped cut.

Lead frames The metallic portion of the device package

that completes the electrical connection path from the die

or dice and from ancillary hybrid circuit elements to the

outside world.

Loop The curve or arc by the wire between the attach-

ment points at each end of a wire bond.

Loop height A measure of the deviation of the wire loop

from the straight line between the attachment points of a

wire bond. Usually, it is the maximum perpendicular dis-

tance from this line to the wire loop.

Micro-bond A bond of a small wire, such as 0.025 mm

[0.001 inch] diameter gold, to a conductor or to a chip

device.

Microcircuit A small circuit (hybrid or monolithic) hav-

ing a relatively high equivalent circuit element density,

which is considered as a single part on (hybrid) or with

(monolithic) a single substrate to perform an electronic cir-

cuit function. (This excludes printed wiring boards, circuit

IPC-D-859 December 1989