IPC-D-859.pdf - 第6页
5.1.4 T esting Requirements ...................................... 39 5.1.5 Layout Concepts .............................................. 40 5.2 Substrate Geometries ....................................... 42 5.2.1 Size…
Table of Contents
1.0 Scope........................................................................ 1
1.1 Purpose .............................................................. 1
1.2 Classification...................................................... 1
1.2.1 Circuit Type....................................................... 1
1.3 Presentation........................................................ 1
2.0 Applicable Documents ........................................... 1
2.1 IPC..................................................................... 1
2.2 Government Documents.................................... 2
2.2.1 Military .............................................................. 2
2.2.2 Federal ............................................................... 2
2.3 Other Publications............................................. 2
2.3.1 ASTM ................................................................ 2
2.3.2 EIA..................................................................... 2
3.0 Design Considerations........................................... 2
3.1 Terms and Definitions ....................................... 2
3.2
Design Features................................................. 6
3.3
Documentation Package.................................... 6
3.3.1
Master Drawing Package .................................. 6
3.3.2
Viewing.............................................................. 7
3.3.3
Location Dimensioning..................................... 7
3.3.4
Hole Location Tolerance................................... 7
3.3.5
Processing Allowances...................................... 7
3.3.6
Datums............................................................... 7
3.4
Electrical Requirement Considerations............. 7
3.4.1
Conductor Thickness and Width....................... 7
3.4.2
Electrical clearance............................................ 7
3.4.3 Impedance/Capacitance Control
Considerations ................................................... 7
3.4.4
Power Distribution Considerations................. 10
3.4.5
Circuit Type Considerations............................ 12
3.5
Thermal Requirement Considerations ............ 14
3.5.1
Material Selection............................................ 16
3.5.2
Substrate Dimensions...................................... 16
3.5.3
General Guidelines.......................................... 16
3.5.4
Heat Dissipation Calculations......................... 16
3.5.5
Thermal Matching........................................... 17
3.6
Mechanical Requirement Considerations ....... 17
3.6.1
Camber............................................................. 17
3.6.2
Support............................................................. 17
3.6.3
Shock and Vibration........................................ 18
3.7
Test Requirement Considerations ................... 18
3.7.1
Hybrid Circuit Layout Design ........................ 18
3.8
Materials .......................................................... 18
3.8.1
Substrates......................................................... 19
3.8.2
Conductive Materials ...................................... 20
3.8.3 Resistive Materials .......................................... 21
3.8.4 Dielectric Materials......................................... 22
3.8.5 Metallic Platings and Coatings....................... 22
3.8.6 Organic Protective Coatings ........................... 23
3.8.7 Solder and Flux............................................... 23
3.8.8 Attachment Materials ...................................... 23
3.8.9 Chip to Substrate Interconnect........................ 25
3.8.10 Tape Automated Bonding (TAB).................... 26
3.8.11 Components..................................................... 27
4.0 Component Mounting and Attachment .............. 29
4.1 General Requirements..................................... 29
4.1.1 Component Placement..................................... 29
4.1.2 Orientation....................................................... 29
4.1.3 Accessibility .................................................... 31
4.1.4 Boundaries....................................................... 31
4.1.5 Chip Carrier Centering.................................... 31
4.1.6 Mounting Components Over Conductors....... 31
4.1.7 Clearances........................................................ 31
4.1.8 Physical Support.............................................. 31
4.1.9 Height Restriction............................................ 31
4.1.10 Heat Dissipation .............................................. 31
4.1.11 Stress Relief..................................................... 31
4.1.12
Automatic Assembly ....................................... 31
4.2
Surface-Mounted Leaded Components........... 32
4.2.1
Gull Wing (Flat-Pack) Components ............... 32
4.2.2
SO I/C’s........................................................... 32
4.2.3
Plastic Chip Carrier......................................... 32
4.2.4
Ribbon Lead Termination................................ 32
4.2.5
Round Lead Termination................................. 32
4.3
Surface Mount Leadless Components ............ 32
4.3.1
Chip Carriers ................................................... 32
4.3.2 Leadless Discrete Components
(Figure 4–12)................................................... 33
4.3.3
MELF............................................................... 33
4.4
Component Lead Sockets................................ 35
4.4.1
Integrated Circuit Sockets............................... 35
4.5
Connectors and Interconnects......................... 35
4.6
Special Wiring................................................. 37
4.6.1
Jumper Wires................................................... 37
4.6.2
Bus Bars .......................................................... 37
4.6.3
Flex Cable........................................................ 38
5.0 Hybrid Circuit Design Requirements.................. 39
5.1
Design/Fabrication Sequence.......................... 39
5.1.1
Schematic/Logic Diagram............................... 39
5.1.2
Parts List.......................................................... 39
5.1.3
End-product Requirements.............................. 39
December 1989 IPC-D-859
iii
5.1.4 Testing Requirements...................................... 39
5.1.5 Layout Concepts.............................................. 40
5.2 Substrate Geometries....................................... 42
5.2.1 Size and Shape ................................................ 42
5.2.2 Dimensions and Tolerances............................. 43
5.2.3 Datums............................................................. 43
5.2.4 Thickness Considerations................................ 43
5.2.5 Substrate Edges ............................................... 43
5.3 Circuit Features ............................................... 43
5.3.1 Conductors....................................................... 43
5.3.2 General Requirements for Lands and
Bond Lands...................................................... 45
5.3.3 Wire Bonds...................................................... 49
5.3.4 Resistors........................................................... 52
5.3.5 Vias .................................................................. 57
5.4 Coatings and Markings ................................... 58
5.4.1 Conformal Coatings ........................................ 58
5.4.2 Compatibility................................................... 58
5.4.3 Legends............................................................ 58
5.5 Artwork............................................................ 58
5.5.1 Artwork Masters.............................................. 59
5.5.2 Base Material................................................... 59
5.5.3 Accuracy.......................................................... 59
5.5.4 Pinholes............................................................ 60
5.5.5 Opaque Defects (Specks)................................ 60
5.5.6 Reproduction Conditions................................. 60
5.5.7 Packaging and Handling of Artwork
Masters............................................................. 60
5.6 Documentation................................................. 60
5.6.1 Master Drawing............................................... 60
5.6.2 Assembly Drawing.......................................... 61
5.6.3 Final Schematic/Logic..................................... 62
5.6.4 Final Bill of Material ...................................... 62
6.0 Quality Assurance................................................. 63
6.1 General............................................................. 63
6.2 Bare Board Testing.......................................... 63
6.2.1 Approaches ...................................................... 63
6.3 Design Considerations..................................... 63
6.3.1 Lands On Grid................................................. 63
6.3.2 Lands Off Grid ................................................ 63
6.3.3 Power-to-Ground Measurement...................... 63
6.4 Test Tapes ........................................................ 63
6.5 Test Circuitry................................................... 63
6.5.1 Quantity ........................................................... 63
6.5.2 Manufacturing Requirements.......................... 63
6.5.3 Identification.................................................... 63
6.5.4 Number of Layers ........................................... 64
6.5.5 Test Coupon Examples For Quality
Conformance Testing....................................... 64
6.5.6 Added Test Circuitry....................................... 65
IPC-D-859 December 1989
iv
Design Standard for Thick Film
Multilayer Hybrid Circuits
1.0 SCOPE
This standard covers the requirements and considerations
for the design of multilayer hybrid circuits based on indus-
try manufacturing capabilities.
1.1 Purpose The purpose of this standard is to establish
rules, principles, and other considerations for mechanical,
electrical, and producible properties which the designer can
use to select design features, and properties that will result
in a multilayer hybrid circuit that will meet performance
and cost requirements.
1.2 Classification When appropriate, this standard will
provide three design complexity classes of features, toler-
ances, or measurements which reflect progressive increases
in sophistication of tooling, materials, or processing and,
therefore, progressive increases in cost. These classes are:
A) Simple, B) Moderate, and C) Complex. The use of one
class for a specific feature does not mean that other fea-
tures must be of the same class. Selection should be based
on the minimum need. In the event of conflict between the
design requirements and the classes defined herein, the
former shall take precedence and be reflected on the mas-
ter drawing.
Design requirements such as precision, performance, and
conductive pattern density determine class. Class defini-
tions identify the precision needed to meet design/
performance requirements of the hybrid circuit.
Classification of design complexity requirements should
not be confused with the performance classification of end-
item use, as referenced in other IPC documentation, such
as IPC-HM-860, which refers to Class 1—consumer prod-
ucts; Class 2—general industrial; and Class 3—high reli-
ability equipment types. The need to apply certain design
concepts should depend on the complexity and precision
required to produce a particular hybrid circuit. Any design
class for any circuit characteristic may be applied to any of
the end-product equipment categories and the classes
described from each, as required. Therefore, a consumer
product designated as Class 1 could require Class A, B or
C design complexity for different attributes of the circuit.
1.2.1 Circuit Type The multilayer hybrid circuit types
defined in the IPC-HM-860 include both refractory and
nonrefractory metal co-fired types (Type I) and thick film
and thin film inorganic types (Type II).
This standard will address only Type II(a), thick film inor-
ganic multilayer hybrid circuits.
1.3 Presentation All dimensions and tolerances are
expressed in metric [and inches, shown in brackets], and
are not direct conversions. Users should employ a single
system, and not intermix millimeters and inches. Reference
information is shown in parentheses ( ).
2.0 APPLICABLE DOCUMENTS
The following documents, of the issue currently in effect,
form a part of this document to the extent specified herein.
2.1 IPC
IPC-T-50
Terms and Definitions
IPC-D-300 Dimensions and Tolerance for Printed Wiring
Applications
IPC-D-310 Guidelines for Artwork Generation and Mea-
surement Techniques
IPC-D-325 End-Product Documentation for Printed Wiring
Boards
IPC-D-350 End Product Description in Numeric Form
IPC-D-351 Printed Wiring Board Documentation in Digi-
tal Form
IPC-D-352 Electronic Design Data Base Description for
Printed Boards
IPC-D-353 Automatic Test Information Description in
Digital Form
IPC-D-354 Library Format Description for Printed Board
Digital Data Bases
IPC-TM-650 Test Methods Manual
IPC-SM-780 Guidelines for Component Packaging and
Interconnection with Emphasis on Surface Mounting
IPC-SM-782 Surface Mount Land Patterns (Configurations
and Design Rules)
IPC-CC-830 Qualification and Performance of Electrical
Insulating Compounds for Printed Board Assemblies
IPC-SM-840 Permanent Polymer Coating (Solder Mask)
for Printed Wiring Boards
IPC-HM-855 Microelectronics Design Guide
December 1989 IPC-D-859
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