CMV12000_DS000603_6-00.pdf - 第13页
Document Feedback CMV12000 Pin Assignment Datasheet • PUBLIC DS000603 • v6 - 00 • 2023 -Sep- 22 84 │ 12 Number Name Type Description H2 CMDP_OSC Bias Decouple with 100 nF to VDD18 H3 CMDP_COMP33 Bias Decouple with 100 nF…
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CMV12000
Pin Assignment
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 11
Number
Name
Type
Description
F22
OUT60_N
LVDS output
LVDS negative output channel 60
F23
OUT60_P
LVDS output
LVDS positive output channel 60
F24
NC
Not connected
F25
NC
Not connected
F26
VDD33
Supply
3.3 V supply
F27
GND
Ground
Ground pin
F28
SPI_EN
Digital input
SPI enable input pin
F29
VRAMP2
Bias
Start voltage second ramp (decouple with 100 nF to GND)
F30
SYS_RES_N
Digital input
Input pin for sequencer reset
G1
VDD_PIX
Supply
3.0 V supply
G2
CMDN_OSC
Bias
Decouple with 100 nF to GND
G3
DIO4
Ground
Connect to ground
G4
VDD_RES
Supply
3.3 V supply
G5
GND
Ground
Ground pin
G6
OUTCLK_N
LVDS output
LVDS negative clock output signal
G7
OUTCLK_P
LVDS output
LVDS positive clock output signal
G8
OUT36_N
LVDS output
LVDS negative output channel 36
G9
OUT36_P
LVDS output
LVDS positive output channel 36
G10
OUT39_N
LVDS output
LVDS negative output channel 39
G11
OUT39_P
LVDS output
LVDS positive output channel 39
G12
OUT43_N
LVDS output
LVDS negative output channel 43
G13
OUT43_P
LVDS output
LVDS positive output channel 43
G14
OUT47_N
LVDS output
LVDS negative output channel 47
G15
OUT47_P
LVDS output
LVDS positive output channel 47
G16
OUT50_N
LVDS output
LVDS negative output channel 50
G17
OUT50_P
LVDS output
LVDS positive output channel 50
G18
OUT54_N
LVDS output
LVDS negative output channel 54
G19
OUT54_P
LVDS output
LVDS positive output channel 54
G20
OUT58_N
LVDS output
LVDS negative output channel 58
G21
OUT58_P
LVDS output
LVDS positive output channel 58
G22
OUT61_N
LVDS output
LVDS negative output channel 61
G23
OUT61_P
LVDS output
LVDS positive output channel 61
G24
OUT64_N
LVDS output
LVDS negative output channel 64
G25
OUT64_P
LVDS output
LVDS positive output channel 64
G26
TDIG2
Digital output
Test pin for digital sequencer signals (do not connect)
G27
TDIG1
Digital output
Test pin for digital sequencer signals (do not connect)
G28
SPI_OUT
Digital output
SPI data output pin
G29
VRAMP1
Bias
Start voltage first ramp (decouple with 100 nF to GND)
G30
FRAME_REQ
Digital input
Frame request pin
H1
GND
Ground
Ground pin
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CMV12000
Pin Assignment
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 12
Number
Name
Type
Description
H2
CMDP_OSC
Bias
Decouple with 100 nF to VDD18
H3
CMDP_COMP33
Bias
Decouple with 100 nF to VDD33
H4
DIO3
Ground
Connect to ground
H5
VDD18
Supply
1.98 V supply
H6
GND
Ground
Ground pin
H7
OUT34_N
LVDS output
LVDS negative output channel 34
H8
OUT34_P
LVDS output
LVDS positive output channel 34
H9
GND
Ground
Ground pin
H10
VDD18
Supply
1.98 V supply
H11
OUT41_N
LVDS output
LVDS negative output channel 41
H12
OUT41_P
LVDS output
LVDS positive output channel 41
H13
OUT45_N
LVDS output
LVDS negative output channel 45
H14
OUT45_P
LVDS output
LVDS positive output channel 45
H15
VDD18
Supply
1.98 V supply
H16
VDD18
Supply
1.98 V supply
H17
OUT52_N
LVDS output
LVDS negative output channel 52
H18
OUT52_P
LVDS output
LVDS positive output channel 52
H19
OUT56_N
LVDS output
LVDS negative output channel 56
H20
OUT56_P
LVDS output
LVDS positive output channel 56
H21
GND
Ground
Ground pin
H22
VDD18
Supply
1.98 V supply
H23
OUT63_N
LVDS output
LVDS negative output channel 63
H24
OUT63_P
LVDS output
LVDS positive output channel 63
H25
GND
Ground
Ground pin
H26
VDD18
Supply
1.98 V supply
H27
GND
Ground
Ground pin
H28
VDD_PIX
Supply
3.0 V supply
H29
SPI_CLK
Digital input
SPI clock input pin
H30
T_EXP1
Digital input
Input pin for external exposure
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CMV12000
Absolute Maximum Ratings
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 13
4 Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only. Functional operation of the device at these or any other
conditions beyond those indicated under “Operating Conditions” is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Figure 5:
Absolute Maximum Ratings of CMV12000
Symbol
Parameter
Min
Max
Unit
Comments
Electrical Parameters
VDD18
Digital supply LVDS, ADC
1.8
2.0
V
VDD33
Analog supply ADC, PGA
3.0
3.6
V
VDD_PIX
Analog pixel supply
2.3
3.6
V
VDD_RES
Analog pixel reset supply
3.0
3.6
V
Continuous Power Dissipation (T
A
= 70 °C)
P
T
Continuous power dissipation
4200
mW
At max. frame rate
Electrostatic Discharge
ESD
HBM
Electrostatic discharge hbm
±2000
V
JS-001-2012 Class 2
Temperature Ranges and Storage Conditions
T
J
Operating junction temperature
-30
70
°C
T
STRG
Storage temperature range
20
40
°C
RH
NC
Relative humidity (non-
condensing)
30
60
%
Storage conditions