CMV12000_DS000603_6-00.pdf - 第19页
Document Feedback CMV12000 Typical Operating Characteristics Datasheet • PUBLIC DS000603 • v6 - 00 • 2023 -Sep- 22 84 │ 18 Figure 9: Spectral Response Figure 10 : Angular Response 0 0.05 0.1 0.15 0.2 0.25 0.3 300 400 500…
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CMV12000
Typical Operating Characteristics
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 17
Parameter
Value
Remark
HDR mode
Interleaved
Multiple slope
2 exposure times for odd/even columns
Partial pixel reset
ADC
8/10/12-bit
Column ADC
Interface
LVDS; 600 Mbit/s
Serial output data + synchronization signals
I/O logic levels
LVDS = 1.8 V
Dig. I/O = 3.3 V
Cover glass
D263T eco
Double sided AR coating
T≥97.0 % abs, 400 - 900 nm, per surface, AOI=15°
Mass
15.2 g
6.2 Spectral Characteristics
Figure 8:
Quantum Efficiency
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
300 400 500 600 700 800 900 1000 1100
Absolute QE
Wavelength [nm]
NIR
Mono
Color_R
Color_Gr
Color_B
Color_Gb
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CMV12000
Typical Operating Characteristics
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 18
Figure 9:
Spectral Response
Figure 10:
Angular Response
0
0.05
0.1
0.15
0.2
0.25
0.3
300 400 500 600 700 800 900 1000 1100
Spectral response [A/W]
Wavelength [nm]
NIR
Mono
Color_R
Color_Gr
Color_B
Color_Gb
0
10
20
30
40
50
60
70
80
90
100
-45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45
Relative response [%]
Incmoming light angle [°]
Vertical
Horizontal
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CMV12000
Functional Description
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 19
7 Functional Description
7.1 Sensor Architecture
Figure 2 shows the image sensor architecture. The internal sequencer generates the necessary
signals for image acquisition. The image is stored in the pixel (global shutter) and they are read out
sequentially, row-by-row. On the pixel output, an analog gain is possible. The pixel values then passes
to a column ADC cell, in which ADC conversion is performed. The digital signals are then read out
over multiple LVDS channels. Each LVDS channel reads out 128 adjacent columns of the array. The
read-out of the pixel array is performed on both sides (top and bottom) of the pixel array to speed up
the read-out process and achieve the frame rate of 300 fps at full resolution and 10-bit. In each line
read-out cycle, two lines are selected for read-out. In the Y-direction, rows of interest are selected
through a row-decoder, which allows a flexible windowing. Control registers are foreseen for the
programming of the sensor. These register parameters are uploaded via a four-wire SPI interface. A
temperature sensor, which can be read out over the SPI interface, is also included.
7.1.1 Pixel Array
The pixel array consists of 4096 x 3072 square global shutter pixels with a pitch of 5.5 μm (5.5 μm x
5.5 μm). This results in an optical area of 22.5 mm x 16.9 mm (28.1 mm diameter).
The pixels are designed to achieve maximum sensitivity with low noise (using CDS) and low PLS
specifications. Micro lenses are placed on top of the pixels for improved fill factor and quantum
efficiency.
There are 16 dark reference columns available on the sensor (columns 0 to 7 and 4088 to 4095)
which can be enabled/disabled by programming the appropriate sensor register.
7.1.2 Analog Front End
The analog front end consists of two major parts, a column amplifier block and a column ADC block.
The column amplifier prepares the pixel signal for the column ADC and applies analog gain if desired
(programmable using the SPI interface). The column ADC converts the analog pixel value to an 8-, 10-
or 12-bit value and can apply a gain. A digital offset can also be applied to the output of the column
ADCs. All gain and offset settings can be programmed using the SPI interface.
7.1.3 LVDS Block
The LVDS block converts the digital data coming from the column ADC into standard serial LVDS data
running at maximum 600 Mbit/s. The sensor has 66 LVDS output pairs: