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Document Feedback CMV12000 Ordering Information Datasheet • PUBLIC DS000603 • v6 - 00 • 2023 -Sep- 22 84 │ 5 2 Ordering Information Ordering Code Package Chroma Delivery Quantity CMV12000-2E5M1PA 237 -µPGA Mono 18 pcs/tr…
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CMV12000
General Description
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 4
1.3 Block Diagram
The functional blocks of this device are shown below:
Figure 2:
Functional Blocks of CMV12000
Pixel array
4096 x 3072 active pixels
SPI
Sequencer
32, 16, 8, 4, 2 or 1 outputs
External driving
signals
...
Input clock
SPI signals
Temp
Sensor
LVDS LVDS LVDS LVDS
Analog Front End
(gain, offset, ADCs)
...
32, 16, 8, 4, 2 or 1 outputs
...
Analog Front End
(gain, offset, ADCs)
...
LVDSLVDS
LVDSLVDS
Pixel (0,3071)
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CMV12000
Ordering Information
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 5
2 Ordering Information
Ordering Code
Package
Chroma
Delivery Quantity
CMV12000-2E5M1PA
237-µPGA
Mono
18 pcs/tray
CMV12000-2E5C1PA
237-µPGA
Color
18 pcs/tray
CMV12000-2E5M1PN
237-µPGA
Mono
18 pcs/tray
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CMV12000
Pin Assignment
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 6
3 Pin Assignment
3.1 Pin Diagram
Figure 3:
Pin Numbering
3.2 Pin Description
Figure 4:
Pin Description of CMV12000
Number
Name
Type
Description
A2
TANA
Analog output
Test pin for analog pixel signals (do not connect)
A3
VREF
Bias
Reference for column amps (decouple with 100 nF to GND)
A4
VPCH_L
Bias
Pre-charge low voltage (decouple with 100 nF to GND)
A5
OUTCTR_N
LVDS output
LVDS negative control channel output
A6
OUTCTR_P
LVDS output
LVDS positive control channel output
A7
OUT2_N
LVDS output
LVDS negative output channel 2
A8
OUT2_P
LVDS output
LVDS positive output channel 2
A9
GND
Ground
Ground pin