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Document Feedback CMV12000 Functional Description Datasheet • PUBLIC DS000603 • v6 - 00 • 2023 -Sep- 22 84 │ 24 7.2.7 SPI Programming Programming the sensor i s done by writing the appropriate values to the on-board regi…

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CMV12000
Functional Description
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 23
The LVDS input clock should only start after the rise time of the supplies. The external reset pin
should be released at least 1 μs after the supplies have become stable. The first frame can be
requested 1 μs after the reset pin has been released. An optional SPI upload (to program the
sequencer) is possible 1 μs after the reset pin has been released. In this case, the FRAME_REQ
pulse must be postponed until after the SPI upload has been completed.
7.2.6 Reset Sequence
If a sensor reset is necessary while the sensor is running, the next sequence should be followed:
Figure 13:
Reset Sequence
The on-board sequencer will be reset and all programming registers will return to their default start-up
values when a falling edge is detected on the SYS_RES_N pin. After the reset there is a minimum
time of 1 μs needed, before a FRAME_REQ pulse can be sent.
When a switch from 12-bit to 10-bit or 8-bit mode (or vice versa) is necessary, the following sequence
should be followed:
Figure 14:
Reset Sequence with Changing Bit Mode
The following SPI register should be uploaded in this mode: Bit_mode (address 118): set to desired bit
resolution mode.
1μs
LVDS_CLK
SYS_RES_N
FRAME_REQ
1μs
LVDS_CLK
SYS_RES_N
FRAME_REQ
Bit mode settings
SPI upload
1μs
CMV12000
Functional Description
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 24
7.2.7 SPI Programming
Programming the sensor is done by writing the appropriate values to the on-board registers. These
registers can be written over a simple serial interface (SPI). The details of the timing and data format
are described below. The data written to the programming registers can also be read out over this
same SPI interface.
SPI I/O’s are pulled low when not used/enabled.
SPI Write
The timing to write data over the SPI interface can be found below.
Figure 15:
SPI Write
The data is sampled by the device on the rising edge of the SPI_CLK and read-in at the last falling
SPI_CLK edge. The SPI_CLK has a maximum frequency of 30 MHz. The SPI_EN signal has to be
high for half a clock period before the first data bit is sampled. SPI_EN has to remain high for one
clock period after the last data bit is sampled.
One write action contains 24 data bits:
● One control bit: First bit to be sent, indicates whether a read (‘0’) or write (‘1’) will occur on the
SPI interface.
● 7 address bits: These bits form the address of the programming register that needs to be
written. The address is sent MSB first.
● 16 data bits: These bits form the actual data that will be written in the register selected with the
address bits. The data is written MSB first.
When several sensor registers need to be written, the timing above can be repeated with SPI_EN
remaining high all the time. See the figure below for an example of 2 registers being written.
Figure 16:
SPI Write of Multiple Registers
SPI_EN
SPI_IN
SPI_CLK
C=’1' A6 A5 A4 A3 A2 A1 A0 D15 D14 D13 ... D3 D2 D1 D0
½ CLK 1 CLK
...
SPI_EN
SPI_IN
SPI_CLK
C=’1' A6 A5 A4 A3 A2 A1 A0 D15 D14 D13 ... D3 D2 D1 D0 C=’1' A6 A5 A4 A3 A2 A1 A0 D15 D14 D13 ... D3 D2 D1 D0
½ CLK 1 CLK
... ...
CMV12000
Functional Description
Datasheet • PUBLIC
DS000603 • v6-00 • 2023-Sep-22
84 │ 25
SPI Read
The timing to read data from the registers over the SPI interface can be found below.
Figure 17:
SPI Read
To indicate a read action over the SPI interface, the control bit on the SPI_IN pin is made ‘0’. The
address of the register being read out is sent immediately after this control bit (MSB first). After the
LSB of the address bits, the data is launched on the SPI_OUT pin on the falling edge of the SPI_CLK
with an 8 ns delay (independent of SPI or sensor clock speeds). This means that the data can be
sampled by the receiving system on the rising edge of the SPI_CLK. The data comes over the
SPI_OUT with MSB first.
7.2.8 Requesting a Frame
After starting up the sensor, a number of frames can be requested by sending a FRAME_REQ pulse.
The number of frames can be set by programming the appropriate register (address 80). The default
number of frames to be grabbed is 1.
In internal exposure mode, the exposure time will start after this FRAME_REQ pulse. In the external
exposure mode, the read-out will start after the FRAME_REQ pulse. Both modes are explained into
detail in the sections below.
Internal Exposure Control
In this mode, the exposure time is set by programming the appropriate register (addresses 71-72) of
the device.
After the high state of the FRAME_REQ pulse is detected, the exposure time will start immediately.
When the exposure time ends (as programmed in the registers), the pixels are being sampled and
prepared for read-out. This sequence is called the frame overhead time (FOT). Immediately after the
FOT, the frame is read out automatically. If more than one frame is requested, the exposure of the
next frame starts already during the read-out of the previous one. See the diagram below for more
details.
SPI_EN
SPI_IN
SPI_CLK
C= 0' A6 A5 A4 A3 A2 A1 A0
D15 D14 D13 D12 D11 D10 D9 D8
SPI_OUT
½ CLK 1 CLK
8ns
D7 D6 D5 D4 D3 D2 D1 D0