IPC-7351-2005_表面贴装焊盘布局设计和标准通用要求.pdf - 第11页

ｗｗｗ．ｂｚｆｘｗ．ｃｏｍ Generic Requirements for Surface Mount Design and Land Pattern Standard 1 SCOPE This document provides information on land pattern geom- etries used for the surface attachment of electronic compo- nents. Th…

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Table 3-17 Conductor Width Tolerances, 0.046 mm

[0.00181 in] Copper, mm [in] ............................ 28

Table 3-18 Feature Location Accuracy (units: mm [in]) ...... 28

Table 6-1 Printed Board Structure Comparison ................ 37

Table 6-2 PCB Structure Selection Considerations .......... 38

Table 6-3 PCB Structure Material Properties .................... 38

Table 14-1 JEDEC Standard JEP95 Allowable Ball

Diameter Variations for FBGA (mm) ................. 58

Table 14-2 Ball Diameter Sizes (mm) ................................. 61

Table 14-3 Land Approximation (mm) ................................. 62

Table 14-4 BGA Variation Attributes (mm) .......................... 62

Table 14-5 Land-to-Ball Calculations for Current and

Future BGA Packages (mm) ............................. 62

IPC-7351 February 2005

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Generic Requirements for Surface

Mount Design and Land Pattern Standard

1 SCOPE

This document provides information on land pattern geom-

etries used for the surface attachment of electronic compo-

nents. The intent of the information presented herein is to

provide the appropriate size, shape and tolerance of surface

mount land patterns to insure sufficient area for the appro-

priate solder ﬁllet to meet the requirements of IPC/EIA

J-STD-001, and also to allow for inspection, testing, and

rework of those solder joints.

1.1 Purpose Although, in many instances, the land pat-

tern geometries can be different based on the type of sol-

dering used to attach the electronic part, wherever possible,

land patterns are deﬁned with consideration to the attach-

ment process being used. Designers can use the informa-

tion contained herein to establish standard conﬁgurations

not only for manual designs but also for computer-aided

design systems. Whether parts are mounted on one or both

sides of the board, subjected to wave, reﬂow, or other type

of soldering, the land pattern and part dimensions should

be optimized to insure proper solder joint and inspection

criteria.

Land patterns are dimensionally deﬁned and are a part of

the printed board circuitry geometry, as they are subject to

the producibility levels and tolerances associated with plat-

ing, etching, assembly or other conditions. The producibil-

ity aspects also pertain to the use of solder mask and the

registration required between the solder mask and the con-

ductor patterns.

Note 1: The dimensions used for component descriptions

have been extracted from standards developed by industrial

and/or standards bodies. Designers should refer to these

standards for additional or speciﬁc component package

dimensions.

Note 2: For a comprehensive description of the given

printed board and for achieving the best possible solder

joints to the devices assembled, the whole set of design

elements includes, beside the land pattern deﬁnition:

• Soldermask.

• Solder paste stencil.

• Clearance between adjacent components.

• Clearance between bottom of component and PCB sur-

face, if relevant.

• Keepout areas, if relevant.

• Suitable rules for adhesive applications.

The whole of design elements is commonly deﬁned as

‘‘mounting conditions.’’ This standard deﬁnes land patterns

and includes recommendations for clearances between

adjacent components and for other design elements.

Note 3: Elements of the mounting conditions, particularly

the courtyard, given in this standard are related to the

reﬂow soldering process. Adjustments for wave or other

soldering processes, if applicable, have to be carried out by

the user. This may also be relevant when solder alloys

other than eutectic tin lead solders are used.

Note 4: This standard assumes that the land pattern fol-

lows the principle that, even under worst case conditions,

the overlap of the component termination and the corre-

sponding soldering land will be complete.

Note 5: Heat dissipation aspects have not been taken into

account in this standard. Greater mass may require slower

process speed to allow heat transfer.

Note 6: Heavier components (greater weight per land)

require larger lands; thus, adding additional land pattern

surface will increase surface area of molten solder to

enhance capabilities of extra weight. In some cases the

lands shown in the standard may not be large enough; in

these cases, considering additional measures may be neces-

sary.

Note 7: The land form may be rectangular with straight or

rounded corners. In the latter case the area of the smallest

circumscribed rectangle shall be equal to that of one with

straight corners.

1.2 Documentation Hierarchy This standard identiﬁes

the generic physical design principles involved in the

creation of land patterns for surface mount components,

and is supplemented by a shareware IPC-7351 Land Pat-

tern viewer that provides, through the use of a graphical

user interface, the individual component dimensions and

corresponding land pattern recommendations based upon

families of components. The IPC-7351 Land Pattern

Viewer is provided on CD-ROM as part of the IPC-7351.

Updates to land pattern dimensions, including patterns for

new component families, can be found on the IPC website

(www.ipc.org) under ‘‘PCB Tools and Calculators.’’ See

Appendix C for more information on the IPC-7351 Land

Pattern Viewer.

February 2005 IPC-7351

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1.2.1 Component and Land Pattern Family Structure

The IPC-7351 provides the following number designation

within the IPC-7350 series for each major family of surface

mount components to indicate similarities in solder joint

engineering goals:

IPC-7352 – Discrete Components

IPC-7353 – Gullwing Leaded Components, Two Sides

IPC-7354 – J-Leaded Components, Two Sides

IPC-7355 – Gullwing Leaded Components, Four Sides

IPC-7356 – J-Leaded Components, Four Sides

IPC-7357 – Post (DIP) Leads, Two Sides

IPC-7358 – Area Array Components (BGA, FBGA, CGA)

IPC-7359 – No Lead Components (QFN, SON, LCC)

1.3 Performance Classification Three general end-

product classes have been established to reﬂect progressive

increases in sophistication, functional performance require-

ments and testing/inspection frequency. It should be recog-

nized that there may be an overlap of equipment between

classes.

The end product user has the responsibility for determining

the ‘‘Use Category’’ or ‘‘Class’’ to which the product

belongs. The contract between user and supplier shall

specify the ‘‘Class’’ required and indicate any exceptions or

additional requirements to the parameters, where appropri-

ate.

Class 1 General Electronic Products – Includes consumer

products, some computer and computer peripherals, and

hardware suitable for applications where the major require-

ment is function of the completed assembly.

Class 2 Dedicated Service Electronic – Products Includes

communications equipment, sophisticated business

machines, and instruments where high performance and

extended life is required, and for which uninterrupted ser-

vice is desired but not mandatory. Typically the end-use

environment would not cause failures.

Class 3 High Reliability Electronic Products – Includes

all equipment where continued performance or

performance-on-demand is mandatory. Equipment down-

time cannot be tolerated, end-use environment may be

uncommonly harsh, and the equipment must function when

required, such as life support systems and other critical

systems.

The IPC-7351 land patterns have the capability of accom-

modating all three performance classiﬁcations.

1.3.1 Producibility Levels When appropriate this stan-

dard will provide three design producibility levels of fea-

tures, tolerances, measurements, assembly, testing of

completion or veriﬁcation of the manufacturing process

that reﬂect progressive increases in sophistication of tool-

ing, materials or processing and, therefore progressive

increases in fabrication cost. These levels are:

Level A General Design Producibility – Preferred

Level B Moderate Design Producibility – Standard

Level C High Design Producibility – Reduced

The producibility levels are not to be interpreted as a

design requirement, but a method of communicating the

degree of difficulty of a feature between design and

fabrication/assembly facilities. The use of one level for a

speciﬁc feature does not mean that other features must be

of the same level. Selection should always be based on the

minimum need, while recognizing that the precision, per-

formance, conductive pattern density, equipment, assembly

and testing requirements determine the design producibility

level. The numbers listed within the tables of IPC-7351 are

to be used as a guide in determining what the level of pro-

ducibility will be for any feature. The speciﬁc requirement

for any feature that must be controlled on the end item

shall be speciﬁed on the master drawing of the printed

board or the printed board assembly drawing.

Classiﬁcation of producibility levels should not be con-

fused with density levels of land pattern geometries

described in 1.4.

1.4 Land Pattern Determination This standard discusses

two methods of providing information on land patterns.

1. Exact details based on industry component speciﬁca-

tions, board manufacturing and component placement

accuracy capabilities. These land patterns are restricted

to a speciﬁc component, and have an identifying IPC-

7351 land pattern name.

2. Equations can be used to alter the given information to

achieve a more robust solder connection, when used in

particular situations where the equipment for placement

or attachment are more or less precise than the assump-

tions made when determining the land pattern details

(see 3.1.2).

Three land pattern geometry variations are supplied for

each of the device families; maximum land protrusion

(Density Level A), median land protrusion (Density Level

B) and minimum land protrusion (Density Level C). Before

adapting the minimum land pattern variations the user

should consider product qualiﬁcation testing based on the

conditions shown in Table 3-15.

Density Level A: Maximum (Most) Land Protrusion –

For low-density product applications, the ‘maximum’ land

pattern condition has been developed to accommodate

wave or ﬂow solder of leadless chip devices and leaded

gull-wing devices. The geometry furnished for these

devices, as well as inward and ‘‘J’’-formed lead contact

device families, may provide a wider process window for

reﬂow solder processes as well.

Density Level B: Median (Nominal) Land Protrusion –

Products with a moderate level of component density may

IPC-7351 February 2005

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