IPC-7351-2005_表面贴装焊盘布局设计和标准通用要求.pdf - 第62页

9.5.3 Resistance to Soldering Parts should be capable of withstanding ten cycles through a standard reﬂow sys- tem operating at 215 °C [419 °F]. Each cycle shall consist of 60 seconds exposure at 215 °C [419 °F]. Parts m…

This standard allows for 6 families of the SOP127. EIAJ

classiﬁes the families by the center-to-center distance of

the land patterns and the outer extremities of the leads

(dimension ‘‘L’’ in IPC-7351). The basic construction of

the SOP127 speciﬁed by EIAJ is the same construction as

for SOIC speciﬁed by JEDEC. Both have gullwing leads

on 1.27 mm centers. The EIAJ speciﬁcation allows for a

number of positions of the components to be in any of the

families (e.g., body width) (see Figure 9-3).

9.3.1 Marking Parts are available with or without part

number markings. Usually an index mark indicates pin 1.

9.3.2 Carrier Package Format Carrier packaging format

may be provided in a tray carrier, but tape and reel carriers

are preferred for best handling and high volume applica-

tions. Bulk packaging is not preferred because of lead

coplanarity required for placement and soldering.

9.3.3 Resistance to Soldering Parts should be capable

of withstanding ten cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. Parts must also

be capable of withstanding a minimum of 10 seconds

immersion in molten solder at 260 °C [500 °F]. See IPC/

JEDEC J-STD-020 for appropriate reﬂow cycles and pro-

ﬁles when using lead free solders.

9.4 TSSOPS The thin shrink small outline package

(TSSOP) is unique among the component families of this

section because its leads protrude from the short side of the

plastic body. The TSSOP components are available in four

different pitches: 0.30 mm, 0.40 mm, 0.50 mm, and

0.65 mm. They are typically speciﬁed by their two largest

dimensions-the plastic body size (in the short dimension),

and the nominal toe-to-toe length (in the long dimension).

Their use has grown because their height (less than

1.27 mm) allows them to be used in memory card technol-

ogy. IPC-7351 outlines sixteen different body sizes with

pin counts ranging from 16-76 pins. In general, as the long

dimension increases, the pitch decreases (see Figure 9-4).

9.4.1 Marking Parts are available with or without part

number markings. Usually an index mark indicates pin 1.

9.4.2 Carrier Packages Format Trays are usually used

for handling TSSOPs.

9.4.3 Resistance to Soldering Parts should be capable

of withstanding ten cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. Parts must also

be capable of withstanding a minimum of 10 seconds

immersion in molten solder at 260 °C [500 °F]. See IPC/

JEDEC J-STD-020 for appropriate reﬂow cycles and pro-

ﬁles when using lead free solders.

9.5 CFP127 See Figure 9-5 for an example of a ceramic

ﬂat pack (CFP127). Basic construction consists of a

ceramic body and metallic leads. Leads are trimmed and

formed into gullwing shape and all are on 1.27 mm centers.

IPC-7353 CFP127 component outlines are derived from

outlines MO-003, MO-004, MO-018, MO-019, MO-020,

MO-021, MO-022 and MO-023 within JEDEC Publication

95.

9.5.1 Marking All parts shall be marked with a part

number and an index area. The index area shall identify the

location of pin 1.

9.5.2 Carrier Packages Format Carrier trays are used

for handling CFPs.

IPC-7351-9-03

Figure 9-3 SOP127 Construction

IPC-7351-9-04

Figure 9-4 TSSOP Construction

IPC-7351-9-05

Figure 9-5 CFP127 Construction

February 2005 IPC-7351

9.5.3 Resistance to Soldering Parts should be capable

of withstanding ten cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. Parts must also

be capable of withstanding a minimum of 10 seconds

immersion in molten solder at 260 °C [500 °F]. See IPC/

JEDEC J-STD-020 for appropriate reﬂow cycles and pro-

ﬁles when using lead free solders.

10 IPC-7354 J-LEADED COMPONENTS, TWO SIDES

The two-sided J lead family is a small outline family iden-

tiﬁed by the dimension of the body size in inches. For

example, the SOJ/300 has a body size of 0.300 inches or

7.63 mm, the SOJ/350 has a body size of 0.350 inches or

8.88 mm, the SOJ/400 has a body size of 0.400 inches or

10.12 mm, and the SOJ/450 has a body size of 0.450

inches or 11.38 mm. Package lead counts range from 14 to

28 pins. IPC-7354 SOJ component outlines are derived

from outlines MO-061, MO-063, MO-065, MO-077,

MO-088, MS-027, and MS-091 within JEDEC Publication

95.

End terminations should be solder coated with a tin/lead

alloy or a lead free equivalent. The solder should contain

between 58 to 68% tin. Solder may be applied to the ter-

mination by hot dipping or by plating from solution. Plated

solder terminations should be subjected to a postplating

reﬂow operation to fuse the solder. The tin/lead ﬁnish

should be at least 0.0075 mm [0.0003 in] thick.

The termination shall be symmetrical, and shall not have

nodules lumps, protrusions, etc., that compromise the sym-

metry or dimensional tolerances of the part. The end termi-

nation shall cover the ends of the components, and shall

extend out to the top and bottom of the component.

Solder ﬁnish applied over precious metal electrodes shall

have a diffusion-barrier layer between the electrode metal-

lization and the solder ﬁnish. The barrier layer should be

nickel or an equivalent diffusion barrier, and should be at

least 0.00125 mm [0.00005 in] thick.

For lead free ﬁnishes a combination of tin, silver and cop-

per is the prevalent replacement for the tin/lead ﬁnish. Sol-

derability testing should be applied per IPC-J-STD-002 to

determine attachment capability of the applicable compo-

nent type.

10.1 Basic Construction See Figure 10-1. The small-

outline ‘‘J’’ (SOJ) package has metallic ‘‘J’’ leads on two

sides, similar to a DIP. The lead conﬁguration, like the let-

ter J, extends out the side of the plastic body package and

bends under the package forming a J bend. The point of

contact of the lead to the land pattern is at the apex of the

J bend and is the basis for the span of the land pattern.

The leads must be coplanar within 0.1 mm. That is, when

the component is placed on a ﬂat surface, no lead may be

more than 0.1 mm off the ﬂat surface.

The SOJ package takes advantage of chips having parallel

address or data line layouts. For example, memory IC’s are

often used in multiples, and buss lines connect to the same

pin on each chip. Memory chips in SOJ packages can be

placed close to one another because of the parallel pin lay-

out and the use of ‘‘J’’ leads. With high capacity memory

systems, the space savings can be signiﬁcant.

10.2 Marking The SOJ family of parts is generally

marked with manufacturers’ part numbers, manufacturers’

name or symbol, and a pin 1 indicator. Some parts may

have a pin 1 feature in the case shape instead of pin 1

marking. Additional markings may include date code/

manufacturing lot and/or manufacturing location.

10.3 Carrier Package Format Components may be pro-

vided in tube or tape packaging. Tape is preferred for best

handling and high volume applications. Bulk packaging is

not acceptable because of lead coplanarity requirements

required for placement and soldering. EIA-481 provides

details on tape requirements.

10.4 Process Considerations J lead packages are nor-

mally processed using standard solder reﬂow processes.

Parts should be capable of withstanding 10 cycles through

a standard reﬂow system operating at 215°C [419 °F]. Each

cycle shall consist of 60 seconds exposure at 215°C

[419 °F]. See IPC/JEDEC J-STD-020 for appropriate

reﬂow cycles and proﬁles when using lead free solders.

11 IPC-7355 GULL-WING LEADED COMPONENTS,

FOUR SIDES

The four-sided gull-wing family is characterized by gull

wing leads on four sides of a square or rectangular pack-

age. The family includes both molded plastic and ceramic

case styles. The acronyms PQFP (Plastic Quad Flat Pack),

BQFP (Bump Quad Flat Pack), SQFP (Shrink Quad Flat

Pack), QFPR (Quad Flat Pack, Rectangular) and CQFP

(Ceramic Quad Flat Pack) are also used to describe the

family.

IPC-7351-10-01

Figure 10-1 SOJ Construction

IPC-7351 February 2005

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There are several lead pitches within the family from

1.27 mm down to 0.30 mm. High lead-count packages are

available in this family that accommodate complex, high

lead-count chips.

The four sided gull-wing families of parts are generally

marked with manufacturer part numbers, manufacturer

name or symbol, and a pin 1 indicator. Some parts may

have a pin 1 feature in the case shape instead of pin 1

marking. Additional markings may include date code/

manufacturing lot and/or manufacturing location.

End terminations should be solder coated with a tin/lead

alloy or a lead free equivalent. The solder should contain

between 58 to 68% tin. Solder may be applied to the ter-

mination by hot dipping or by plating from solution. Plated

solder terminations should be subjected to a postplating

reﬂow operation to fuse the solder. The tin/lead ﬁnish

should be at least 0.0075 mm [0.0003 in] thick.

The termination shall be symmetrical, and shall not have

nodules lumps, protrusions, etc., that compromise the sym-

metry or dimensional tolerances of the part. The end termi-

nation shall cover the ends of the components, and shall

extend out to the top and bottom of the component.

Solder ﬁnish applied over precious metal electrodes shall

have a diffusion-barrier layer between the electrode metal-

lization and the solder ﬁnish. The barrier layer should be

nickel or an equivalent diffusion barrier, and should be at

least 0.00125 mm [0.00005 in] thick.

For lead free ﬁnishes a combination of tin, silver and cop-

per is the prevalent replacement for the tin/lead ﬁnish. Sol-

derability testing should be applied per IPC-J-STD-002 to

determine attachment capability of the applicable compo-

nent type.

Four-sided gull-wing families are usually processed using

standard solder reﬂow processes. Parts should be capable

of withstanding ten cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. High lead-

count ﬁne pitch parts may require special processing out-

side the normal pick/place and reﬂow manufacturing opera-

tions. See IPC/JEDEC J-STD-020 for appropriate reﬂow

cycles and proﬁles when using lead free solders.

All parts shall be marked with a part number and an index

area. The index area shall identify the location of pin 1.

Note: Four sided gull-wing packages are normally pro-

cessed by solder reﬂow operations. High lead-count ﬁne

pitch parts may require special processing outside the nor-

mal pick/place and reﬂow manufacturing operations.

Separate pick/place, excise, and reﬂow processes are some-

times used as an alternate to normal SMT processes.

11.1 BQFP (PQFP) See Figure 11-1. BQFPs have leads

on a 0.635 mm pitch. IPC-7355 BQFP component outlines

are derived from outlines MO-069 and MO-086 within

JEDEC Publication 95.

11.1.1 Carrier Package Format The carrier package for-

mat for BQFPs is the tube format; however, packaging

trays provide the best handling capability.

11.2 SQFP/QFP The shrink quad ﬂat pack (SQFP) has

been developed for applications requiring low height and

high density. The SQFP, along with the TSOP components,

are frequently used in memory card applications. The

square SQFP/QFP family has leads on a 0.80 mm,

0.65 mm, 0.63 mm, 0.50 mm, 0.40 mm, or 0.30 mm pitch.

IPC-7355 SQFP/QFP component outlines are derived from

outline MO-108 within JEDEC Publication 95.

Two different pin counts are allowed for each package and

the component will still meet the standard (e.g., a 5x5

package with a 0.3 mm pitch can have either 56 or 48 pins,

and still meet EIAJ-7404-1). QFPs are also square and

come in larger pitches (see Figure 11-2).

11.2.1 Carrier Package Format The carrier package for-

mat for ﬂatpacks may be tube format; but, in most

instances, ﬂatpacks are delivered in a carrier tray.

IPC-7351-11-01

Figure 11-1 BQFP Construction

IPC-7351-11-02

Figure 11-2 SQFP and QFP Construction

February 2005 IPC-7351