IPC-7351-2005_表面贴装焊盘布局设计和标准通用要求.pdf - 第6页

ｗｗｗ．ｂｚｆｘｗ．ｃｏｍ Table of Contents 1 SCOPE ...................................................................... 1 1.1 Purpose ................................................................. 1 1.2 Documentation Hierarchy…

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Acknowledgment
Any document involving a complex technology draws material from a vast number of sources. While the principal members
of the Surface Mount Land Patterns Subcommittee (1-13) of the Printed Board Design Committee (1-10) are shown below,
it is not possible to include all of those who assisted in the evolution of this standard. To each of them, the members of the
IPC extend their gratitude.
Printed Board Design
Committee
Surface Mount Land Patterns
Subcommittee
Technical Liaisons of the
IPC Board of Directors
Chair
Lionel Fullwood
WKK Distribution, Ltd.
Chair
Nick Mescia
Nanolytics, Inc.
Vice-Chair
Karen E. McConnell, C.I.D.
Lockheed Martin
Peter Bigelow
IMI Inc.
Sammy Yi
Flextronics International
Surface Mount Land Patterns Subcommittee
Jasbir Bath, Solectron Corporation
James Mark Bird, Amkor Technology
Inc.
Byron Case, L-3 Communications
Phillip Chen, Northrop Grumman
Canada Corporation
Yves Desrochers, Nortel Networks
William C. Dieffenbacher, BAE
Systems Platform Solutions
Gerhard Diehl, Alcatel SEL AG
John Dusl, Lockheed Martin
Werner Engelmaier, Engelmaier
Associates, L.C.
Howard S. Feldmesser, Johns
Hopkins University
Gary M. Ferrari, C.I.D.+, Ferrari
Technical Services
Michael R. Green, Lockheed Martin
Space Systems Company
Tom J. Hausherr, C.I.D.+, PCB
Libraries, Inc.
William Hazen, Raytheon Company
Frank Kimmey, C.I.D.+, Powerwave
Technologies
Narinder Kumar, C.I.D., Solectron
Invotronics
Clifford H. Lamson, C.I.D.+, Plexus
Technology Group
Wesley R. Malewicz, Draeger
Medical Systems, Inc.
Kenneth Manning, Raytheon
Company
Lum Wee Mei, DSO National
Laboratories
Jeff Mellquist, C.I.D.+, PCB
Libraries, Inc.
Frank Mortan, Texas Instruments
Deepak K. Pai, C.I.D.+, General
Dynamics-Advanced Information
Daryl Sato, Intel Corporation
Jeff Shubrooks, Raytheon Company
JaMi Smith, C.I.D.+
Vern Solberg, Tessera Technologies,
Inc.
Rick Thompson, SMTEK
International, Inc.
Max E. Thorson, C.I.D.,
Hewlett-Packard Company
Si Van, Foxconn EMS, Inc.
Frank Williams, Jr., C.I.D., Leitch
Incorporated
James V. Yohe, C.I.D., Yohe Design
Services
Michael W. Yuen, Foxconn EMS,
Inc.
February 2005 IPC-7351
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Table of Contents
1 SCOPE ...................................................................... 1
1.1 Purpose ................................................................. 1
1.2 Documentation Hierarchy .................................... 1
1.2.1 Component and Land Pattern Family
Structure ............................................................... 2
1.3 Performance Classification .................................. 2
1.3.1 Producibility Levels ............................................. 2
1.4 Land Pattern Determination ................................ 2
1.5 Terms and Definitions ......................................... 3
2 APPLICABLE DOCUMENTS ................................... 5
2.1 IPC ....................................................................... 5
2.2 Electronic Industries Association ........................ 5
2.3 Joint Industry Standards (IPC) ............................ 5
2.4 International Electrotechnical Commission ........ 6
2.5 Joint Electron Device Engineering Council
(JEDEC) ............................................................... 6
3 DESIGN REQUIREMENTS ....................................... 6
3.1 Dimensioning Systems ........................................ 6
3.1.1 Component Tolerancing ....................................... 6
3.1.2 Land Tolerancing ................................................. 9
3.1.3 Fabrication Allowances ....................................... 9
3.1.4 Assembly Tolerancing ....................................... 10
3.1.5 Dimension and Tolerance Analysis ................... 10
3.2 Design Producibility .......................................... 18
3.2.1 SMT Land Pattern ............................................. 18
3.2.2 Standard Component Selection ......................... 18
3.2.3 Circuit Substrate Development ......................... 18
3.2.4 Assembly Considerations .................................. 18
3.2.5 Provision for Automated Test ............................ 18
3.2.6 Documentation for SMT ................................... 18
3.3 Environmental Constraints ................................ 18
3.3.1 Moisture Sensitive Components ........................ 18
3.3.2 End-Use Environment Considerations .............. 18
3.4 Design Rules ...................................................... 20
3.4.1 Component Spacing ........................................... 20
3.4.2 Single- and Double-Sided Board Assembly ..... 20
3.4.3
Component Stand-off Height for Cleaning ....... 22
3.4.4
Fiducial Marks ................................................... 22
3.4.5
Conductors ......................................................... 24
3.4.6
Via Guidelines ................................................... 24
3.4.7
Standard PCB Fabrication Allowances ............. 27
3.4.8
Panelization ........................................................ 27
3.5
Outer Layer Surface Finishes ............................ 30
3.5.1 Solder Mask Finishes ........................................ 30
3.5.2 Solder Mask Clearances .................................... 30
3.5.3 Land Pattern Surface Finishes ........................... 31
4 COMPONENT QUALITY VALIDATION ................. 31
4.1 Validation Techniques ........................................ 31
5 TESTABILITY .......................................................... 32
5.1 Board and Assembly Test .................................. 32
5.1.1 Bare-Board Test ................................................. 32
5.1.2 Assembled Board Test ....................................... 32
5.2 Nodal Access ..................................................... 33
5.2.1 Test Philosophy .................................................. 33
5.2.2 Test Strategy for Bare Boards ........................... 33
5.3 Full Nodal Access for Assembled Board .......... 33
5.3.1 In-Circuit Test Accommodation ........................ 33
5.3.2 Multi-Probe Testing ........................................... 34
5.4 Limited Nodal Access ....................................... 34
5.5 No Nodal Access ............................................... 34
5.6 Clam-Shell Fixtures Impact ............................... 34
5.7 Printed Board Test Characteristics .................... 35
5.7.1 Test Land Pattern Spacing ................................. 35
5.7.2 Test Land Size and Shape ................................. 35
5.7.3 Design for Test Parameters ............................... 35
6 PRINTED BOARD STRUCTURE TYPES .............. 36
6.1 General Considerations ...................................... 38
6.1.1 Categories ........................................................... 39
6.1.2 Thermal Expansion Mismatch ........................... 39
6.2 Organic-Base Material ....................................... 39
6.3 Nonorganic Base Materials ............................... 39
6.4 Alternative PCB Structures ............................... 39
6.4.1 Supporting-Plane PCB Structures ..................... 39
6.4.2
High-Density PCB Technology ......................... 39
6.4.3
Constraining Core Structures ............................ 39
6.4.4
Porcelainized Metal (Metal Core) Structures ... 39
7 ASSEMBLY CONSIDERATION FOR SURFACE
MOUNT TECHNOLOGY (SMT)
.............................. 39
7.1
SMT Assembly Process Sequence .................... 39
7.2
Substrate Preparation ......................................... 40
7.2.1
Adhesive Application ......................................... 40
7.2.2
Conductive Adhesive ......................................... 40
7.2.3
Solder Paste Application ................................... 40
7.2.4
Solder Preforms ................................................. 41
7.3
Component Placement ....................................... 41
IPC-7351 February 2005
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7.3.1 Component Data Transfer ................................. 41
7.4 Soldering Processes ........................................... 42
7.4.1 Wave Soldering .................................................. 42
7.4.2 Vapor Phase (VP) Soldering ............................. 42
7.4.3 IR Reflow Soldering .......................................... 43
7.4.4 Hot Air/Gas Convection Soldering ................... 43
7.4.5 Laser Reflow Soldering ..................................... 43
7.4.6 Conduction Reflow Soldering ........................... 43
7.5 Cleaning ............................................................. 43
7.6 Repair/Rework ................................................... 43
7.6.1 Heatsink Effects ................................................. 43
7.6.2 Dependence on Printed Board
Material Type ..................................................... 44
7.6.3 Dependence on Copper Land and
Conductor Layout .............................................. 44
8 IPC-7352 DISCRETE COMPONENTS ................... 44
8.1 Chip Resistors (RESC) ...................................... 44
8.1.1 Basic Construction ............................................. 45
8.1.2 Marking .............................................................. 45
8.1.3 Carrier Package Format ..................................... 45
8.1.4 Resistance to Soldering ..................................... 45
8.2 Chip Capacitors (CAPC) ................................... 45
8.2.1 Basic Construction ............................................. 45
8.2.2 Marking .............................................................. 45
8.2.3 Carrier Package Format ..................................... 45
8.2.4 Resistance to Soldering ..................................... 45
8.3
Inductors (INDC, INDM, INDP) ...................... 45
8.3.1
Basic Construction ............................................. 45
8.3.2
Marking .............................................................. 45
8.3.3
Carrier Package Format ..................................... 45
8.3.4
Resistance to Soldering ..................................... 45
8.4
Tantalum Capacitors (CAPT) ............................ 45
8.4.1
Basic Construction ............................................. 46
8.4.2
Marking .............................................................. 46
8.4.3
Carrier Package Format ..................................... 46
8.4.4
Resistance to Soldering ..................................... 46
8.5 Metal Electrode Face Diodes (DIOMELF,
RESMELF) ........................................................ 47
8.5.1
Basic Construction ............................................. 47
8.5.2
Marking .............................................................. 47
8.5.3
Carrier Package Format ..................................... 47
8.5.4
Resistance to Soldering ..................................... 47
8.6
SOT23 ................................................................ 47
8.6.1
Basic Construction ............................................. 47
8.6.2
Marking .............................................................. 47
8.6.3
Carrier Package Format ..................................... 47
8.6.4 Resistance to Soldering ..................................... 47
8.7 SOT89 ................................................................ 47
8.7.1 Basic Construction ............................................. 47
8.7.2 Marking .............................................................. 48
8.7.3 Carrier Package Format ..................................... 48
8.7.4 Resistance to Soldering ..................................... 48
8.8 SOD123 .............................................................. 48
8.8.1 Basic Construction ............................................. 48
8.8.2 Marking .............................................................. 48
8.8.3 Carrier Package Format ..................................... 48
8.8.4 Resistance to Soldering ..................................... 48
8.9 SOT143 .............................................................. 48
8.9.1 Basic Construction ............................................. 48
8.9.2 Marking .............................................................. 48
8.9.3 Carrier Package Format ..................................... 48
8.9.4 Resistance to Soldering ..................................... 48
8.10 SOT223 .............................................................. 48
8.10.1 Basic Construction ............................................. 49
8.10.2 Marking .............................................................. 49
8.10.3 Carrier Package Format ..................................... 49
8.10.4 Resistance to Soldering ..................................... 49
8.11 TO252 (DPAK Type) ......................................... 49
8.11.1 Basic Construction ............................................. 49
8.11.2 Marking .............................................................. 49
8.11.3 Carrier Package Format ..................................... 49
8.11.4 Resistance to Soldering ..................................... 49
8.12 Molded Body Diode (DIOSMB) ....................... 49
9 IPC-7353 GULLWING LEADED COMPONENTS,
TWO SIDES
............................................................ 49
9.1 SOIC ................................................................... 50
9.1.1 Basic Construction ............................................. 50
9.1.2 Marking .............................................................. 50
9.1.3 Carrier Package Format ..................................... 50
9.1.4 Resistance to Soldering ..................................... 50
9.2 SOP8/SOP63 (SSOIC) ....................................... 50
9.2.1 Basic Construction ............................................. 50
9.2.2 Marking .............................................................. 50
9.2.3 Carrier Package Format ..................................... 50
9.2.4 Resistance to Soldering ..................................... 50
9.3 SOP127 (SOP-IPC-782) .................................... 50
9.3.1 Marking .............................................................. 51
9.3.2
Carrier Package Format ..................................... 51
9.3.3
Resistance to Soldering ..................................... 51
9.4
TSSOPS ............................................................. 51
9.4.1
Marking .............................................................. 51
9.4.2
Carrier Packages Format ................................... 51
February 2005 IPC-7351
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