IPC-7351-2005_表面贴装焊盘布局设计和标准通用要求.pdf - 第14页

ｗｗｗ．ｂｚｆｘｗ．ｃｏｍ *Constraining Core – A supporting plane that is internal to a packaging and interconnecting structure. Courtyard – The smallest rectangular area that provides a minimum electrical and mechanical clearance (…

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consider adapting the ‘median’ land pattern geometry. The

median land patterns furnished for all device families will

provide a robust solder attachment condition for reﬂow

solder processes and should provide a condition suitable

for wave or reﬂow soldering of leadless chip and leaded

gull-wing type devices.

Density Level C: Minimum (Least) Land Protrusion –

High component density typical of portable and hand-held

product applications may consider the ‘minimum’ land pat-

tern geometry variation. Selection of the minimum land

pattern geometry may not be suitable for all product use

categories. The use of classes of performance (1, 2, and 3)

is combined with that of component density levels (A, B,

and C) in explaining the condition of an electronic assem-

bly. As an example, combining the description as Levels

1A or 3B or 2C, would indicate the different combinations

of performance and component density to aid in under-

standing the environment and the manufacturing require-

ments of a particular assembly.

Note: It is the responsibility of the user to verify the SMT

land patterns used for achieving an undisturbed mounting

process, including testing and an ensured reliability for the

product stress conditions in use. In addition the size and

shape of the proposed land pattern may vary according to

the solder resist aperture, the size of the land pattern exten-

sion (dog bone), the via within the extension, or if the via

is in the land pattern itself.

1.5 Terms and Definitions

Terms and deﬁnitions used herein are in accordance with

IPC-T-50 except as otherwise speciﬁed. Note: Any deﬁni-

tion denoted with an asterisk (*) is a reprint of the term

deﬁned in IPC-T-50.

*Assembly – A number of parts, subassemblies or combi-

nations thereof joined together. (Note: This term can be

used in conjunction with other terms listed herein, e.g.,

‘‘Printed Board Assembly.’’)

Assembly, Double-Sided – Packaging and interconnecting

structure with components mounted on both the primary

and secondary sides.

Assembly, Multilayer Printed Circuit (wiring) – Multi-

layer printed circuit or printed wiring board on which sepa-

rately manufactured components and parts have been

added.

Assembly, Packaging and Interconnecting (P&IA) –

Generic term for an assembly that has electronic compo-

nents mounted on either one or both sides of a packaging

and interconnecting structure.

Assembly, Printed Board – An assembly of several printed

circuit assemblies or printed wiring assemblies, or both.

Assembly, Printed Circuit (wiring) – A printed circuit or

printed wiring board on which separately manufactured

components and parts have been added.

Assembly, Single-Sided – Packaging and interconnecting

structure with components mounted only on the primary

side.

*Base Material – The insulating material upon which a

conductive pattern may be formed. (The base material may

be rigid or ﬂexible, or both. It may be a dielectric or insu-

lated metal sheet.)

*Basic Dimension – A numerical value used to describe

the theoretical exact location of a feature or hole. (It is the

basis from which permissible variations are established by

tolerance on other dimensions in notes or by feature con-

trol symbols.)

*Blind Via – A via extending only to one surface of a

printed board.

*Buried Via – A via that does not extend to the surface of

a printed board.

*Castellation – A recessed metalized feature on the edge of

a leadless chip carrier that is used to interconnect conduct-

ing surface or planes within or on the chip carrier.

*Chip Carrier – A low-proﬁle, usually square, surface-

mount component semiconductor package whose die cavity

or die mounting area is a large fraction of the package size

and whose external connections are usually on all four

sides of the package. (It may be leaded or leadless.)

*Chip-On-Board (COB) – A printed board assembly tech-

nology that places unpackaged semiconductor dice and

interconnects them by wire bonding or similar attachment

techniques. Silicon area density is usually less than that of

the printed board.

*Coefficient of Thermal Expansion (CTE) – The linear

dimensional change of a material per unit change in tem-

perature. (See also ‘‘Thermal Expansion Mismatch.’’)

*Component – An individual part or combination of parts

that, when together, perform a design function(s). (See also

‘‘Discrete Component.’’)

*Component Mounting Site – The location on a Package

Interconnect (P&I) structure that consists of a land pattern

and conductor fan-out to additional lands for testing or vias

that are associated with the mounting of a single compo-

nent.

*Conductive Pattern – The conﬁguration or design of the

conductive material on a base material. (This includes con-

ductors, lands, vias, heatsinks and passive components

when these are an integral part of the printed board manu-

facturing process.)

*Conductor – A single conductive path in a conductive

pattern.

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*Constraining Core – A supporting plane that is internal to

a packaging and interconnecting structure.

Courtyard – The smallest rectangular area that provides a

minimum electrical and mechanical clearance (courtyard

excess) around the combined component body and land

pattern boundaries.

Courtyard Excess – The area between the rectangle cir-

cumscribing the land pattern and the component, and the

outer boundary of the courtyard. The courtyard excess may

be different in the x- and y-direction.

Courtyard Manufacturing Zone – The area that provides

a minimum electrical and mechanical clearance (courtyard

excess) around the combined component body and land

pattern boundries.

*Dual-Inline Package (DIP) – A basically-rectangular

component package that has a row of leads extending from

each of the longer sides of its body that are formed at right

angles to a plane that is parallel to the base of its body.

*Fine-Pitch Technology (FPT) – A surface-mount assem-

bly technology with component terminations on less than

0.625 mm [0.025 in] centers.

*Fiducial (Mark) – A printed board artwork feature(s) that

is created in the same process as the conductive pattern and

that provides a common measurable point for component

mounting with respect to a land pattern or land patterns.

*Flat Pack – A rectangular component package that has a

row of leads extending from each of the longer sides of its

body that are parallel to the base of its body.

*Footprint – See ‘‘Land Pattern.’’

*Grid – An orthogonal network of two sets of parallel

equidistant lines that is used for locating points on a

printed board.

*Integrated Circuit (IC) – A combination of inseparable

associated circuit elements that are formed in place and

interconnected on or within a single base material to per-

form a particular electrical function.

*Jumper wire – A discrete electrical connection that is part

of the original design and is used to bridge portions of the

basic conductive pattern formed on a printed board.

*Land – A portion of a conductive pattern usually used for

the connection and/or attachment of components.

*Land Pattern – A combination of lands that is used for

the mounting, interconnection and testing of a particular

component.

*Leadless Chip Carrier – A chip carrier whose external

connections consist of metallized terminations that are an

integral part of the component body. (See also ‘‘Leaded

Chip Carrier.’’)

Leaded Chip Carrier – A chip carrier whose external con-

nections consist of leads that are around and down the side

of the package. (See also ‘‘Leadless Chip Carrier.’’)

*Master Drawing – A control document that shows the

dimensional limits or grid locations that are applicable to

any and all parts of a product to be fabricated, including

the arrangement of conductors and nonconductive patterns

or elements; the size, type, and location of holes; and all

other necessary information.

Mixed Component-Mounting Technology – A component

mounting technology that uses both through-hole and

surface-mounting technologies on the same packaging and

interconnecting structure.

*Module – A separable unit in a packaging scheme.

Nominal Dimension – A dimension that is between the

maximum and minimum size of a feature. (The tolerance

on a nominal dimension gives the limits of variation of a

feature size.)

*Packaging and Interconnecting Structure (P&IS) – The

general term for a completely processed combination of

base materials, supporting planes or constraining cores, and

interconnection wiring that are used for the purpose of

mounting and interconnecting components.

*Plated-Through Hole (PTH) – A hole with plating on its

walls that makes an electrical connection between conduc-

tive patterns on internal layers, external layer, or both, of a

printed board.

*Primary Side – The side of a packaging and interconnect-

ing structure that is so deﬁned on the master drawing. (It is

usually the side that contains the most complex or the most

number of components.)

*Printed Board (PB) – The general term for completely

processed printed circuit and printed wiring conﬁgurations.

(This includes single-sided, double-sided and multilayer

boards with rigid, ﬂexible, and rigid-ﬂex base materials.)

*Printed Wiring – A conductive pattern that provides

point-to-point connections but not printed components in a

predetermined arrangement on a common base. (See also

‘‘Printed Circuit.’’)

*Registration – The degree of conformity of the position

of a pattern (or portion thereof), a hole, or other feature to

its intended position on a product.

*Secondary Side – That side of a packaging and intercon-

necting structure that is opposite the primary side. (It is the

same as the ‘‘solder side’’ on through-hole mounting tech-

nology.)

*Single-Inline Package (SIP) – A component package

with one straight row of pins or wire leads.

IPC-7351 February 2005

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Static Charge – An electrical charge that has accumulated

or built up on the surface of a material

Static Electricity Control – A technique where materials

and systems are employed to eliminate/discharge static

electricity build-up by providing continuous discharge

paths

*Supported Hole – A hole in a printed board that has its

inside surfaces plated or otherwise reinforced.

*Supporting Plane – A planar structure that is a part of a

packaging and interconnecting structure in order to provide

mechanical support, thermo-mechanical constraint, thermal

conduction and/or electrical characteristics. (It may be

either internal or external to the packaging and intercon-

necting structure.) (See also ‘‘Constraining Core.’’)

*Surface Mount Technology (SMT) – The electrical con-

nection of components to the surface of a conductive pat-

tern that does not utilize component holes.

*Tented Via (Type I Via) – A via with a mask material

(typically dry ﬁlm) applied bridging over the via wherein

no additional materials are in the hole. It may be applied to

one side or both.

*Thermal Mismatch – The absolute difference between the

thermal expansion of two components or materials. (See

also ‘‘Coefficient of Thermal Expansion (CTE).’’)

*Through Connection – The electrical connection to con-

nect conductor patterns on the front side through to the

back side of a printed board. (See also ‘‘Interfacial Connec-

tion.’’)

*Through-Hole Technology (THT) – The electrical con-

nection of components to a conductive pattern by the use

of component holes.

*Tooling Feature – A physical feature that is used exclu-

sively to position a printed board or panel during a fabrica-

tion, assembly or testing process. (See also ‘‘Locating

Edge,’’ ‘‘Locating Edge Marker,’’ ‘‘Locating Notch,’’

‘‘Locating Slot,’’ and ‘‘Tooling Hole.’’)

*Via – A plated-through hole that is used as an interlayer

connection, but in which there is no intention to insert a

component lead or other reinforcing material. (See also

‘‘Blind Via’’ and ‘‘Buried Via.’’)

2 APPLICABLE DOCUMENTS

2.1 IPC

IPC-A-48 Surface Mount Land Pattern Artwork (Mantech)

IPC-A-49 Surface Mount Land Pattern Artwork (IPC-SM-

782)

IPC-T-50 Terms and Deﬁnitions for Interconnecting and

Packaging Electronic Circuits

IPC-A-610 Acceptability of Printed Board Assemblies

IPC-SM-785 Guidelines for Accelerated Reliability Testing

of Surface Mount Solder Attachments

IPC-S-816 SMT Process Guideline and Checklist

IPC-1902 Grid System for Printed Circuits

IPC-2221 Generic Standard on Printed Board Design

IPC-2226 Sectional Design Standard for High Density

Interconnect (HDI) Printed Boards

IPC-2581 Generic Requirements for Printed Board Assem-

bly Products Manufacturing Description Data and Transfer

Methodology

IPC-6012 Qualiﬁcation and Performance Standard for

Rigid Printed Boards

IPC-7095 Design and Assembly Process Implementation

for BGAs

IPC-7525 Stencil Design Guidelines

IPC-7530 Guidelines for Temperature Proﬁling for Mass

Soldering Processes

IPC-7711/21 Rework and Repair Guide

IPC-9701 Performance Test Methods and Qualiﬁcation

Requirements for Surface Mount Solder Attachments

2.2 Electronic Industries Association

EIA-481 Tape and Reel Speciﬁcation

2.3 Joint Industry Standards (IPC)

J-STD-001 Requirements for Soldered Electrical and Elec-

tronic Assemblies

J-STD-002 Solderability Tests for Component Leads, Ter-

minations, Lugs, Terminals and Wires

J-STD-003 Solderability Tests for Printed Boards

J-STD-033 Handling, Packing, Shipping and Use of

Moisture/Reﬂow Sensitive Surface Mount Devices

1. www.ipc.org

2. www.eia.org

3. www.ipc.org

February 2005 IPC-7351