IPC-7351-2005_表面贴装焊盘布局设计和标准通用要求.pdf - 第57页

8.5 Metal Electrode Face Diodes (DIOMELF, RES- MELF) Resistors, ceramic capacitors, and tantalum capacitors may all be packaged in these tubular shapes. 8.5.1 Basic Construction See Figures 8-6 and 8-7. 8.5.2 Marking Par…

8.4.1 Basic Construction See Figure 8-5.

8.4.2 Marking Parts are available with or without

marked capacitance values.

8.4.3 Carrier Package Format Bulk rods, 8 mm tape/4

mm pitch is preferred for best handling. Tape and reel

speciﬁcations provide additional requirements.

8.4.4 Resistance to Soldering Parts should be capable

of withstanding ﬁve cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. Parts must also

be capable of withstanding a minimum of 10 seconds

immersion in molten solder at 260 °C [500 °F]. See IPC/

JEDEC J-STD-020 for appropriate reﬂow cycles and pro-

ﬁles when using lead free solders.

IPC-7351-8-03

Figure 8-3 Chip Capacitor Construction

1. Termination

2. Dielectric

3. Electrode

4. Chip Length

5."A" Electrode Print

6. Electrode Print

7. Cap (Topping Layer)

8. End Margin

9. Base Layer

10. Shim (Active Dielectric Layer)

11. Side Margin

12. Chip Thickness

13. Chip Width

14. Termination Width

2 3

IPC-7351-8-04

Figure 8-4 Inductor Construction

Ferrite

Chip

▼

Precision Wire—Wound Molded

External

Electrode

▼

IPC-7351-8-05

Figure 8-5 Tantalum Capacitor Construction

IPC-7351 February 2005

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8.5 Metal Electrode Face Diodes (DIOMELF, RES-

MELF)

Resistors, ceramic capacitors, and tantalum

capacitors may all be packaged in these tubular shapes.

8.5.1 Basic Construction See Figures 8-6 and 8-7.

8.5.2 Marking Parts are available with or without

marked values.

8.5.3 Carrier Package Format Bulk rods, 8 mm tape/4

mm pitch is preferred for best handling. Tape and reel

speciﬁcations provide additional requirements.

8.5.4 Resistance to Soldering Parts should be capable

of withstanding ﬁve cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. Parts must also

be capable of withstanding a minimum of 10 seconds

immersion in molten solder at 260 °C [500 °F]. See IPC/

JEDEC J-STD-020 for appropriate reﬂow cycles and pro-

ﬁles when using lead free solders.

8.6 SOT23 One of the ﬁrst active devices in packaged

form for surface mounting was the SOT device. Plastic

encapsulated three terminal devices with leads formed out

from the body were surface mounted to overcome some of

the problems and difficulties in handling dip transistors. In

general, SOT packages are used with diodes, transistors,

and small I/O devices. The SOT 23 package is the most

common three-lead surface mount conﬁguration.

8.6.1 Basic Construction The SOT 23 package has had

several redesigns to meet the needs of both hybrid and

printed board surface mount industries. These changes

resulted in low, medium and high proﬁle characteristics

which basically reﬂect the clearance that the body is from

the mounting surface. See Figure 8-8 for construction char-

acteristics.

8.6.2 Marking Parts are available with or without

marked values.

8.6.3 Carrier Package Format Carrier package format

shall be according to the following: body type TO-236,

8 mm tape/4 mm pitch.

8.6.4 Resistance to Soldering Parts should be capable

of withstanding ﬁve cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. Parts must also

be capable of withstanding a minimum of 10 seconds

immersion in molten solder at 260 °C [500 °F]. See IPC/

JEDEC J-STD-020 for appropriate reﬂow cycles and pro-

ﬁles when using lead free solders.

8.7 SOT89 These parts are for high power transistors and

diodes. These parts are used where heat transfer to a sup-

porting structure is important. IPC-7352 SOT89 component

outlines are derived from outline TO-243 Issue ‘‘C’’ within

JEDEC Publication 95.

8.7.1 Basic Construction See Figure 8-9. The SOT 89

package dimensions are designed to meet the needs of both

the hybrid and printed board surface mount industries. In

IPC-7351-8-06

Figure 8-6 Metal Electrode Face Component

Construction

IPC-7351-8-07

Figure 8-7 Break-Away Diagram of MELF Components

IPC-7351-8-08

Figure 8-8 SOT 23 Construction

Passivated

Semiconductor Chip

Collector Lead

Bonding Wire

Epoxy Body

Emitter

Lead

Base

Lead

February 2005 IPC-7351

order to provide an adequate heat transfer path, there is no

clearance between the body of the component and the

packaging and interconnect structure. This design may

accommodate the reﬂow or wave soldering processes.

8.7.2 Marking Parts are available with or without

marked values.

8.7.3 Carrier Package Format Carrier package format

shall be according to the following: body type TO-243,

12 mm tape/8 mm pitch.

8.7.4 Resistance to Soldering Parts should be capable

of withstanding ten cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. Parts must also

be capable of withstanding a minimum of 10 seconds

immersion in molten solder at 260 °C [500 °F]. See IPC/

JEDEC J-STD-020 for appropriate reﬂow cycles and pro-

ﬁles when using lead free solders.

8.8 SOD123 IPC-7352 SOD123 component outlines are

derived from outline DO-214 ‘‘Issue B’’ within JEDEC

Publication 95.

8.8.1 Basic Construction The small outline diode comes

in two conﬁgurations. One is a gullwing-leaded (SOD123)

conﬁguration as shown in Figure 8-10. The other is a

molded conﬁguration with terminations (DIOSMB).

8.8.2 Marking Parts are available with or without

marked values.

8.8.3 Carrier Package Format Carrier package formats

are tape and reel; 12 mm tape/8 mm pitch.

8.8.4 Resistance to Soldering Parts should be capable

of withstanding 10 cycles through a standard reﬂow system

operating at 215 °C [419 °F]. Each cycle shall consist of 60

seconds exposure at 215 °C [419 °F]. Parts must also be

capable of withstanding a minimum of 10 seconds immer-

sion in molten solder at 260 °C [500 °F]. See IPC/JEDEC

J-STD-020 for appropriate reﬂow cycles and proﬁles when

using lead free solders.

8.9 SOT143 These parts are for dual diodes and Darling-

ton transistors. IPC-7352 SOT143 component outlines are

derived from outline TO-253 ‘‘Issue C’’ within JEDEC

Publication 95.

8.9.1 Basic Construction The dimensional characteris-

tics are designed to meet the needs of the surface mount

industry. The clearance between the body of the component

and the packaging and interconnect structure is speciﬁed at

0.05 mm to 0.13 mm [0.002 in to 0.005 in] to accommo-

date reﬂow or wave soldering processes (see Figure 8-11).

8.9.2 Marking Parts are available with or without

marked values.

8.9.3 Carrier Package Format Carrier package format

shall be according to the following: body type TO-253,

8 mm tape/4 mm pitch.

8.9.4 Resistance to Soldering Parts should be capable

of withstanding ﬁve cycles through a standard reﬂow sys-

tem operating at 215 °C [419 °F]. Each cycle shall consist

of 60 seconds exposure at 215 °C [419 °F]. Parts must also

be capable of withstanding a minimum of 10 seconds

immersion in molten solder at 260 °C [500 °F]. See IPC/

JEDEC J-STD-020 for appropriate reﬂow cycles and pro-

ﬁles when using lead free solders.

8.10 SOT223 These parts are for dual diodes and Dar-

lington transistors. IPC-7352 SOT223 component outlines

are derived from outline TO-261 ‘‘Issue C’’ within JEDEC

Publication 95.

IPC-7351-8-09

Figure 8-9 SOT 89 Construction

IPC-7351-8-10

Figure 8-10 SOD 123 Construction

IPC-7351-8-11

Figure 8-11 SOT143 Construction

IPC-7351 February 2005

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