IPC-7351-2005_表面贴装焊盘布局设计和标准通用要求.pdf - 第16页
ｗｗｗ．ｂｚｆｘｗ．ｃｏｍ 2.4 International Electrotechnical Commission 4 IEC-61 188 Printed Boards and Printed Board Assemblies - Design and Use 2.5 Joint Electron Device Engineering Council (JEDEC) 5 Publication 95 JEDEC Registere…
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Static Charge – An electrical charge that has accumulated
or built up on the surface of a material
Static Electricity Control – A technique where materials
and systems are employed to eliminate/discharge static
electricity build-up by providing continuous discharge
paths
*Supported Hole – A hole in a printed board that has its
inside surfaces plated or otherwise reinforced.
*Supporting Plane – A planar structure that is a part of a
packaging and interconnecting structure in order to provide
mechanical support, thermo-mechanical constraint, thermal
conduction and/or electrical characteristics. (It may be
either internal or external to the packaging and intercon-
necting structure.) (See also ‘‘Constraining Core.’’)
*Surface Mount Technology (SMT) – The electrical con-
nection of components to the surface of a conductive pat-
tern that does not utilize component holes.
*Tented Via (Type I Via) – A via with a mask material
(typically dry film) applied bridging over the via wherein
no additional materials are in the hole. It may be applied to
one side or both.
*Thermal Mismatch – The absolute difference between the
thermal expansion of two components or materials. (See
also ‘‘Coefficient of Thermal Expansion (CTE).’’)
*Through Connection – The electrical connection to con-
nect conductor patterns on the front side through to the
back side of a printed board. (See also ‘‘Interfacial Connec-
tion.’’)
*Through-Hole Technology (THT) – The electrical con-
nection of components to a conductive pattern by the use
of component holes.
*Tooling Feature – A physical feature that is used exclu-
sively to position a printed board or panel during a fabrica-
tion, assembly or testing process. (See also ‘‘Locating
Edge,’’ ‘‘Locating Edge Marker,’’ ‘‘Locating Notch,’’
‘‘Locating Slot,’’ and ‘‘Tooling Hole.’’)
*Via – A plated-through hole that is used as an interlayer
connection, but in which there is no intention to insert a
component lead or other reinforcing material. (See also
‘‘Blind Via’’ and ‘‘Buried Via.’’)
2 APPLICABLE DOCUMENTS
2.1 IPC
1
IPC-A-48 Surface Mount Land Pattern Artwork (Mantech)
IPC-A-49 Surface Mount Land Pattern Artwork (IPC-SM-
782)
IPC-T-50 Terms and Definitions for Interconnecting and
Packaging Electronic Circuits
IPC-A-610 Acceptability of Printed Board Assemblies
IPC-SM-785 Guidelines for Accelerated Reliability Testing
of Surface Mount Solder Attachments
IPC-S-816 SMT Process Guideline and Checklist
IPC-1902 Grid System for Printed Circuits
IPC-2221 Generic Standard on Printed Board Design
IPC-2226 Sectional Design Standard for High Density
Interconnect (HDI) Printed Boards
IPC-2581 Generic Requirements for Printed Board Assem-
bly Products Manufacturing Description Data and Transfer
Methodology
IPC-6012 Qualification and Performance Standard for
Rigid Printed Boards
IPC-7095 Design and Assembly Process Implementation
for BGAs
IPC-7525 Stencil Design Guidelines
IPC-7530 Guidelines for Temperature Profiling for Mass
Soldering Processes
IPC-7711/21 Rework and Repair Guide
IPC-9701 Performance Test Methods and Qualification
Requirements for Surface Mount Solder Attachments
2.2 Electronic Industries Association
2
EIA-481 Tape and Reel Specification
2.3 Joint Industry Standards (IPC)
3
J-STD-001 Requirements for Soldered Electrical and Elec-
tronic Assemblies
J-STD-002 Solderability Tests for Component Leads, Ter-
minations, Lugs, Terminals and Wires
J-STD-003 Solderability Tests for Printed Boards
J-STD-033 Handling, Packing, Shipping and Use of
Moisture/Reflow Sensitive Surface Mount Devices
1. www.ipc.org
2. www.eia.org
3. www.ipc.org
February 2005 IPC-7351
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2.4 International Electrotechnical Commission
4
IEC-61188 Printed Boards and Printed Board Assemblies -
Design and Use
2.5 Joint Electron Device Engineering Council (JEDEC)
5
Publication 95 JEDEC Registered and Standard Outlines
for Solid State Products
3 DESIGN REQUIREMENTS
3.1 Dimensioning Systems
This section describes a set
of dimensional criteria for components, land patterns, posi-
tional accuracy of the component placement capability and
the opportunity to create a certain size solder joint com-
mensurate with reliability or product performance analysis.
Profile tolerances are used in the dimensioning system to
define the size range between maximum and minimum
component/lead dimensions without ambiguity. The profile
tolerance is intended to control both size and position of
the land. Figure 3-1 shows the profile tolerancing method.
The use of the profile dimensioning system requires an
understanding of the concepts. The use of a set of require-
ments are adopted and invoke the following rules, unless
otherwise modified.
a. All dimensions are basic (nominal).
b. Limits of size control form as well as size.
c. Perfect form is required at maximum dimensions.
d. Datum references and position tolerances apply at maxi-
mum dimensions, and are dependent on feature size.
e. Position dimensions originate from maximum dimen-
sions.
f. Tolerances and their datum references other than size
and position apply regardless of feature size (RFS).
The dimensioning concepts used for this system of analy-
sis consider the assembly/attachment requirements as their
major goal. Specification (data) sheets for components or
dimensions for land patterns on boards may use different
dimensioning concepts, however, the goal is to combine all
concepts into a single system. Users are encouraged to
establish the appropriate relationship between their dimen-
sioning system(s) and the profile dimensioning system and
analysis concepts described herein to allow for ease of tai-
loring these concepts for robust process performance. As
an example, if the tolerance used for positioning is larger
than the machine tolerance used in production, a single
dimensional change could modify the land pattern.
3.1.1 Component Tolerancing The component manu-
facturers and industry standards organizations are respon-
sible for the dimensioning and tolerancing of electronic
components (see 3.1.5.2). The basic dimensions and toler-
ance limits published in the specifications have been con-
verted to a functional equivalent using the profile toleranc-
ing method with all components shown with their basic
dimensions as limit dimensions (maximum or minimum
size). Profile tolerances are unilateral, and are described to
reflect the best condition for solder joint formation.
The concept for component dimension evaluations is based
on evaluating the surfaces of the component termination
and component lead or contact that are involved in the
4. www.iec.ch
5. www.jedec.org
IPC-7351-3-01
Figure 3-1 Profile Tolerancing Method
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2.5
MMC
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0.1
MMC
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Places
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formation of the acceptable solder joint. Component manu-
facturers usually provide dimensions for their parts with a
nominal size and then put a tolerance on that nominal
dimension. In order to facilitate the dimensioning system,
these dimensions and their associated tolerances are con-
verted to minimum and maximum size.
As an example, capacitor C3216 has a manufactured nomi-
nal dimension for its length of 3.2 mm. The tolerance
described by the manufacturer is ± 0.2 mm. Thus, the mini-
mum dimension of ‘‘L’’ is 3.0 mm with a unilateral toler-
ance of 0.4 mm, resulting in its maximum dimension being
3.4 mm.
Figure 3-2 shows the characteristics for the 3216 capacitor.
Item A in Figure 3-2 shows the component manufacturer’s
dimensions for the length of the capacitor. Item B in Fig-
ure 3-2 shows the component length at its minimum size in
the converted dimensions of the new system using profile
tolerancing. Item C in Figure 3-2 shows the land pattern at
its maximum size. These conditions provide for an opti-
mum toe fillet. For optimum heel fillet, the component
basic dimensions are at the maximum and the land pattern
is at its minimum.
Similar concepts are applied to leaded surface mount parts.
The critical dimensional characteristics identified are those
that relate to the formation of the toe and heel solder fillet.
For components with gull-wing leads, the basic dimensions
apply across the outer extremities of the part for toe land
projection; and within the inside of the formed radius of
opposing leads for heel solder fillet formation.
The outer dimensions of leaded or even leadless chip car-
riers are usually easy to determine since these are readily
available from the component manufacturer or standards
organization. The inner (heel-to-heel) dimensions are not
provided in industry standards or manufacturers’ specifica-
tions and are more difficult to determine, not only because
of the form of the lead, termination, or castellation but also
because the inner dimensions must be derived by subtract-
ing the sum of the dimensions of the leads (with all their
inherent tolerances) from the overall dimensions of the
part.
Item A in Figure 3-3 shows the concept for the manufac-
turer’s dimensions and tolerances for a gull-wing SOIC.
Item B in Figure 3-3 shows the converted dimensions to be
considered in the overall mounting system requirements.
IPC-7351-3-02
Figure 3-2 Example of 3216 (1206) Capacitor Dimensioning for Optimum Solder Fillet Condition
3.2 ± 0.2 mm
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3.0 LMC
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0.2
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Maximum
Component Size
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Z
MMC
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0.05
Manufacturers dimensions
and tolerances (maximum
length of part is 3.4 mm).
Part shown with length at
"least material condition,"
and profile tolerance to
indicate maximum range of
component length at 3.4 mm.
Land pattern with dimension Z
at "maximum material condition."
Profile tolerance of part (0.2 X 2),
plus profile tolerance of land pattern
(0.05 X 2) plus placement accuracy
(0.1 diameter of true position) are
considered in determining the
proper dimension for Z , plus
the desired toe fillet.
A
B
C
February 2005 IPC-7351
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