MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS.pdf - 第260页

MIL-STD-883F METHOD 2010.11 18 June 2004 50 Condition A Conditi on B Class le vel S Class lev el B 3.2.5. 1 Foreign mater ial, die coat ed devices . This inspec tion and c rit eria s hall be r equired on al l devic es th…

MIL-STD-883F

METHOD 2010.11

18 June 2004

Condition A Condition B

Class level S Class level B

3.2.5 Foreign material

. Die inspections shall be at high magnification. Package and lid inspections shall be at low

magnification. Die criteria may be examined at high magnification prior to die mounting provided they are re-examined at

low magnification during preseal inspection. No device shall be acceptable that exhibits:

NOTE: Foreign material may be removed, if possible, by subjecting the device to a nominal gas blow (less than 25 psig).

After this gas blow off at inspection, all wire bonded devices shall be inspected/reinspected for possible wire damage.

Use of a higher psig value is permitted provided that the manufacturer has characterized the process and has data to

assure that no damage is done to the wire bonds. This data shall be available upon request to the preparing or

acquiring activities.

a. Foreign particle(s) on the surface of the die that is (are) large enough to bridge the narrowest spacing between

unglassivated operating material (e.g., metallization, bare semiconductor material, mounting material, bonding

wire, etc.).

b. Foreign particle(s) other than on the surface of the die within the package or on the lid or cap that is (are) large

enough to bridge the narrowest spacing between unglassivated operating materials and are not the following:

Semiconductor material, glass splatter, gold imperfections in the die attach area, gold eutectic material or

package ceramic material.

NOTE: As an alternative to 100 percent visual inspection of lids or caps, the lids or caps may be subjected to a

suitable cleaning process and quality verification, approved by the qualifying activity. The lids or caps shall

subsequently be held in a controlled environment until capping or preparation for seal.

c. Foreign material attached to or embedded in the die surface that appears to bridge the active circuit elements

including metallization unless verified as only attached but not embedded by high power dark field illumination.

d. Liquid droplets, chemical stains, ink, or photoresist on the die surface that appear to bridge any combination of

unglassivated metallization or bare semiconductor material areas.

e. A particle of gold eutectic material, package ceramic material or semiconductor material, not attached to the die,

large enough to bridge the narrowest spacing between unglassivated operating materials, that does not exhibit a

minimum of 50 percent cumulative peripheral fillet or whose height is greater than the longest base dimension.

NOTE 1: This criteria shall not be cause for rejection

when the assembly process contains a gas blow (less

than 60 psig) after die attach and again Less than 25

psig) after wire bond provided rejectable materials (not

attached and large enough to bridge) have been removed

from the cavity.

NOTE 2: Gold imperfections in the die attach area that do not interfere with proper die attachment, sealing glass splatter

(provided it does not suggest inadequately controlled process and does not interfere with the die attach area) or

internal glass run out from frit seal (provided it is confined to package walls and does not interfere with the die

attach area) are not rejectable.

MIL-STD-883F

METHOD 2010.11

18 June 2004

Condition A Condition B

Class level S Class level B

3.2.5.1 Foreign material, die coated devices

. This inspection and criteria shall be required on all devices that receive a

die coat during the assembly process. This inspection will be done after die coat cure. No device shall be acceptable that

exhibits:

a. Unattached foreign particles on the surface of the die coat or within the package that is (are) large enough to

bridge the narrowest spacing between unglassivated operating material (e.g., metallization, bare semiconductor

material, mounting material, bonding wire, etc.). Note: Semiconductor particles shall be considered as foreign

material.

b. Partially embedded foreign material with an "unembedded portion" that is large enough to bridge the narrowest

spacing between unglassivated operating material (e.g., metallization, bare semiconductor material, mounting

material, bonding wire, etc.).

c. Foreign material attached to or embedded in the die coat that appears to bridge unglassivated operating material

when viewed from above (e.g., bare semiconductor material, bond pads, bonding wire, mounting material, etc.).

d. Embedded foreign particles that penetrate the entire thickness of the die coating.

3.2.5.1.1 Die coating material

. No device shall be accepted that exhibits:

a. Surface scratches that penetrate the die coating and expose underlying glassivated metal.

b. Die coating that is lifted or is peeling from the semiconductor surface.

3.2.6 GaAs backside metallization

. GaAs inspection shall be performed with low magnification prior to die mounting.

(Verification at high magnification is permitted.) With the approval of the acquiring activity, the manufacturer may substitute

a sample inspection plan at the wafer level for 100 percent inspection in dice form. The sample inspection plan shall be

documented in the manufacturer's baseline documentation and shall be performed to the requirements of test method 5013.

No devices shall be acceptable that exhibit the following.

a. Evidence of metal corrosion, lifting, peeling, blistering.

b. Voids or scratches that expose underlying metal or substrate whose cumulative areas are more than 25 percent of

the cell area or device area.

NOTE: Absence of gold in the die separation area (saw street) of devices with electroplated backside metallization is

not a cause for rejection. Small voids at edges due to die separation are acceptable if they comprise less

than 10 percent of the backside area.

c. Any voids or scratches in the substrate via metallization that effects more than 25 percent of the metallization or

cause unintended isolation of the metallization path.

d. Underetched vias.

e. Overetched vias.

4. SUMMARY

. The following details shall be specified in the applicable acquisition document.

a. Test condition (see 3).

b. Where applicable, any conflicts with approved circuit design topology or construction.

c. Where applicable, gauges, drawings, and photographs that are to be used as standards for operator comparison

(see 2).

d. Where applicable, specific magnification (see 3).

MIL-STD-883F

METHOD 2011.7

22 March 1989

METHOD 2011.7

BOND STRENGTH (DESTRUCTIVE BOND PULL TEST)

1. PURPOSE

. The purpose of this test is to measure bond strengths, evaluate bond strength distributions, or determine

compliance with specified bond strength requirements of the applicable acquisition document. This test may be applied to

the wire-to-die bond, wire-to-substrate bond, or the wire-to-package lead bond inside the package of wire-connected

microelectronic devices bonded by soldering, thermocompression, ultrasonic, or related techniques. It may also be applied

to bonds external to the device such as those from device terminals-to-substrate or wiring board or to internal bonds

between die and substrate in non-wire-bonded device configurations such as beam lead or flip chip devices.

2. APPARATUS

. The apparatus for this test shall consist of suitable equipment for applying the specified stress to the

bond, lead wire or terminal as required in the specified test condition. A calibrated measurement and indication of the

applied stress in grams force (gf) shall be provided by equipment capable of measuring stresses up to twice the specified

minimum limit value, with an accuracy of ±5 percent or ±0.3 gf, whichever is the greater tolerance.

3. PROCEDURE

. The test shall be conducted using the test condition specified in the applicable acquisition document

consistent with the particular device construction. All bond pulls shall be counted and the specified sampling, acceptance,

and added sample provisions shall be observed, as applicable. Unless otherwise specified, for conditions A, C, and D, the

sample size number specified for the bond strength test shall determine the minimum sample size in terms of the minimum

number of bond pulls to be accomplished rather than the number of complete devices in the sample, except that the required

number of bond pulls shall be randomly selected from a minimum of 4 devices. Bond pulls in accordance with test

conditions D, F, G, and H, while involving two or more bonds shall count as a single pull for bond strength and sample size

number purposes. Unless otherwise specified, for conditions F, G, and H the sample size number specified shall determine

the number of die to be tested (not bonds). For hybrid or multichip devices (all conditions), a minimum of 4 die or use all die

if four are not available on a minimum of 2 completed devices shall be used. Where there is any adhesive, encapsulant or

other material under, on or surrounding the die such as to increase the apparent bond strength, the bond strength test shall

be performed prior to application.

When flip chip or beam-lead chips are bonded to substrates other than those in completed devices, the following conditions

shall apply:

a. The sample of chips for this test shall be taken at random from the same chip population as that used in the

completed devices that they are intended to represent.

b. The chips for this test shall be bonded on the same bonding apparatus as the completed devices, during the time

period within which the completed devices are bonded.

c. The test chip substrates shall be processed, metallized, and handled identically with the completed device

substrates, during the same time period within which the completed device substrates are processed.

3.1 Test conditions

3.1.1 Test condition A - Bond peel

. This test is normally employed for bonds external to the device package. The lead or

terminal and the device package shall be gripped or clamped in such a manner that a peeling stress is exerted with the

specified angle between the lead or terminal and the board or substrate. Unless otherwise specified, an angle of 90 degrees

shall be used. When a failure occurs, the force causing the failure and the failure category shall be recorded.

3.1.2 Test condition C - Wire pull (single bond)

. This test is normally employed for internal bonds at the die or substrate

and the lead frame of microelectronic devices. The wire connecting the die or substrate shall be cut so as to provide two

ends accessible for pull test. In the case of short wire runs, it may be necessary to cut the wire close to one termination in

order to allow pull test at the opposite termination. The wire shall be gripped in a suitable device and simple pulling action

applied to the wire or to the device (with the wire clamped) in such a manner that the force is applied approximately normal

to the surface of the die or substrate. When a failure occurs, the force causing the failure and the failure category shall be

recorded.