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MIL-STD-883F METHOD 3021 29 May 1987 2 This page i ntenti onally lef t blank

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MIL-STD-883F
METHOD 3021
29 May 1987
1
METHOD 3021
HIGH IMPEDANCE (OFF-STATE) HIGH-LEVEL OUTPUT LEAKAGE CURRENT
1. PURPOSE
. This method establishes the means for assuring circuit performance to the limits specified in the
applicable acquisition document in regard to output leakage current when an output is in the high-impedance state with a
high-level voltage applied. This current should normally be specified as a maximum positive value (I
OHZ
maximum). This
method applies to digital microelectronic devices, such as TTL, DTL, RTL, ECL and MOS that have tristate outputs.
2. APPARATUS
. The test chamber shall be capable of maintaining the device under test at any specified test
temperature. An instrument shall be provided that has the capability of applying the specified high level voltage to the output
terminal and measure the resultant current flowing out of the terminals.
3. PROCEDURE
. The device shall be stabilized at the specified test temperature. Apply voltages to the test circuit as
follows:
a. Worst-case power supply voltage (V
CC
) applied to the V
CC
terminal.
b. Threshold level voltage (V
IH
minimum or V
IL
maximum) applied to the control inputs which will cause the output
under test to be in the high-impedance (off) state.
c. Nonthreshold level voltage applied to the logic input terminals controlling the output under test so as to produce a
"hard" low voltage level at that output if the output was not in the high-impedance state. Apply the specified high
logic level voltage to the output terminal under test and measure the resultant leakage current. Outputs shall be
measured individually.
4. SUMMARY
. The following details shall be specified in the applicable acquisition document:
a. Test temperature.
b. Worst case power supply voltages.
c. Threshold voltage levels for control inputs.
d. Voltages at logic input terminals for output under test.
e. Output voltage.
f. I
OLZ
maximum positive limit.
MIL-STD-883F
METHOD 3021
29 May 1987
2
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MIL-STD-883F
METHOD 3022
29 May 1987
1
METHOD 3022
INPUT CLAMP VOLTAGE
1. PURPOSE
. This method establishes the means for assuring circuit performance to the limits specified in the
applicable acquisition document in regard to input voltage levels in a region of relatively low differential resistance that serve
to limit the input voltage swing. Input clamp voltage is specified as a maximum positive value (V
IC
POS) or the maximum
negative value (V
IC
NEG). This method applies to digital microelectronic devices.
2. APPARATUS
. The test chamber shall be capable of maintaining the device under test at any specified test
temperature. The test apparatus shall be capable of supplying the worst case power supply voltage and shall be capable of
loading the input of the circuit under test with the specified negative current or the specified positive current, both referred to
as I
IN
. Resistors may be used to simulate the applicable current levels.
3. PROCEDURE
. The device shall be stabilized at the specified test temperature. Apply worst-case power supply
voltage (V
CC
) to the V
CC
terminal. Force the specified negative current from or the positive current into the input under test
and measure the resultant input voltage. (NOTE: Any input for which the I
IL
would influence the negative input current (I
IN
)
should have V
IC
measured with the V
CC
terminal open). All input terminals not under test may be high, low, or open to
minimize or inhibit any outside factors (noise, transients, etc.) from affecting the test. Inputs shall be tested individually.
4. SUMMARY
. The following details shall be specified in the applicable acquisition document:
a. Test temperature.
b. Worst case power supply voltage.
c. Current to be forced from the input terminal.
d. V
IC
(POS) or V
IC
(NEG) maximum limit.