MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS.pdf - 第312页

MIL-STD-883F METHOD 2017.8 18 June 2004 22 This page i ntenti onally lef t blank

MIL-STD-883F

METHOD 2017.8

18 June 2004

Class H Class K

3.1.9 Package conditions, "magnification 10X to 60X"

. No device will be acceptable that exhibits:

a. Unattached foreign material within the package or on the seal flange.

NOTE: All foreign material shall be considered to be unattached unless otherwise verified to be attached. Verification of

attachments of foreign material whose longest dimensions are greater than 75 percent of the closest unglassivated

conductive spacing shall be accomplished by a light touch with an appropriate mechanical device (i.e., needle, probe, pick,

etc.). Verification of attachments of smaller material can be satisfied by suitable cleaning process approved by the acquiring

activity. All foreign material or particles may be verified as attached with a nominal gas blow (approximately 20 psig).

NOTE: Semiconductor chips shall be considered foreign particles.

b. Attached foreign material that bridges metallization paths, two package leads, lead to package metallization,

functional circuit elements, junctions, or any combination thereof.

c. Liquid droplets or any chemical stain that bridges any combination of unglassivated operating metallization.

d. Physical damage or contamination (eutectic or polymer material) that prevents adequate sealing of the seal

surface.

e. Presence of any residual flux.

NOTE: Use 10X to 15X magnification.

f. Foreign material in melt that does not exhibit a fillet.

4. SUMMARY

. The following details shall be specified in the applicable acquisition document:

a. Test condition (see 3).

b. Where applicable, gages, drawings and photographs that are to be used as standards for operator comparison

(see 2).

c. Where applicable, specific magnification if other than that specified (see 3).

MIL-STD-883F

METHOD 2017.8

18 June 2004

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MIL-STD-883F

METHOD 2018.4

18 June 2004

METHOD 2018.4

SCANNING ELECTRON MICROSCOPE (SEM) INSPECTIONS

1. PURPOSE

. This method provides a means of judging the quality and acceptability of device interconnect metallization

on non-planar oxide integrated circuit wafers or dice. SEM inspection is not required on planar oxide interconnect

technology such as chemical mechanical polish (CMP) processes. It addresses the specific metallization defects that are

batch process orientated and which can best be identified utilizing this method. Conversely, this method should not be used

as a test method for workmanship and other type defects best identified using method 2010.

Samples submitted to SEM shall not be shipped as functional devices unless it has been shown that the device structure, in

combination with the equipment operating conditions, is nondestructive.

1.1 Definitions

1.1.1 Barrier adhesion metal

. The lower layer of multi-layer metal system deposited to provide a sound mechanical bond

to silicon/silicon oxide surfaces or to provide a diffusion barrier of a metal into an undesired area such as aluminum into a

contact window.

1.1.2 Cross-sectional plane

. An imaginary plane drawn perpendicular to current flow and which spans the entire width of

the metallization stripe as illustrated in figure 2018-1. Metallization stripes over topographical variations (e.g., passivation

steps, cross-overs, bird's head), which are nonperpendicular to current flow, are projected onto cross-sectional planes for

purposes of calculating cross-sectional area reductions.

1.1.3 Destructive SEM

. The use of specific equipment parameters and techniques that result in unacceptable levels of

radiation damage or contamination of the inspected semiconductor structure.

1.1.4 Directional edge

. A directional edge (see figure 2018-2) is typically the edge(s) of a rectangular contact window

over which metallization may be deposited for the purpose of carrying current into, through, or out of the contact window for

device operation. It should be noted that contact geometry, site of concern, or both may vary and if so, the directional edge

concept should be modified accordingly.

1.1.5 General metallization (conductors)

. The metallization at all locations including metallization (stripes) in the actual

contact window regions with the exception being at areas of topographical variation (e.g., passivation steps, bird's head,

cross-overs).

1.1.6 Glassivation

. Glassivation is the top layer(s) of transparent insulating material that covers the active circuit area

(including metallization), except bonding pads and beam leads.

1.1.7 Interconnection

. The metal deposited into a via to provide an electrical conduction path between isolated metal

layers.

1.1.8 Major current-carrying directional edge

. The directional edge(s) which is designed to provide a path for the flow of

current into, through, or out of a contact window or other area(s) of concern (see figure 2018-2).

1.1.9 Multi-layer metallization (conductors)

. Two or more layers of metal used for electrical conduction that are not

isolated from each other by a grown or deposited insulating material. The term "underlying metal" shall refer to any layer

below the top layer of metal.

1.1.10 Multi-level metallization (conductors)

. A single layer or a multi-layer of metal shall represent a single level of

metallization. A combination of such levels, isolated from each other by a grown or deposited layer of insulating material,

shall comprise the multi-level metallization interconnection system. The use of vias to selectively connect portions of such

level combinations through the isolation shall not effect this definition.