MIL- STD-883F 2004 TEST METHOD STANDARD MICROCIRCUITS.pdf - 第550页

MIL-STD-883F METHOD 3024 19 August 1994 6 This pat intent ionally l eft bl ank

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MIL-STD-883F
METHOD 3024
19 August 1994
5
3.2. Ground bounce test procedure. The output to be tested should be conditioned to a low level. The scope probe (if
used) shall be connected to the output under test no more than 0.25 inches from the pin. The probe ground lead shall be
attached to a suitable location (ground plane or pin) and have a maximum length of 1 inch. The ground bounce noise is the
peak voltage in the positive (V
OLP
) and negative (V
OLV
) directions measured from the nominal V
OL
level (see figure 3024-3).
The noise must be measured at both the LOW to HIGH and the HIGH to LOW transition of the switching outputs. (Two
consecutive areas of disruption need to be analyzed for the largest peak. If a second scope channel is available, it can be
used to monitor the switching outputs and ease synchronization of the noise.) This test shall be repeated with each output
at a low level with all others (functionally possible) switching. The largest peak on the worst output is the device ground
bounce noise. Engineering judgement or experience may be used to reduce the number of pins tested provided that the
rationale for this reduction of pins tested is documented and made available to the preparing activity or the acquiring activity
upon request. (Generally, the noisiest pin on one device will be the noisiest pin on all devices of that type.)
3.3 V
CC
bounce test procedure. The output to be tested should be conditioned to a high level. The scope probe (if used)
shall be connected to the output under test no more than 0.25 inches from the pin. The probe ground lead shall be attached
to a suitable location (ground plane or pin) and have a maximum length of 1 inch. The V
CC
bounce noise is the peak voltage
in the positive (V
OHP
) and negative (V
OHV
) directions measured from the nominal V
OH
level. The noise must be measured at
both the LOW to HIGH and the HIGH to LOW transition of the switching outputs. (Two consecutive areas of disruption need
to be analyzed for the largest peak. If a second scope channel is available, it can be used to monitor the switching outputs
and ease synchronization of the noise.) This test shall be repeated with each output at a high level with all others
(functionally possible) switching. The largest peak on the worst output is the device V
CC
bounce noise. Engineering
judgement or experience may be used to reduce the number of pins tested provided that the rationale for this reduction of
pins tested is documented and made available to the preparing activity or the acquiring activity upon request. (Generally,
the noisiest pin on one device will be the noisiest pin on all devices of that type.)
4. Summary
. The following details, when applicable, shall be specified in the acquisition document:
a. V
CC
Supply voltage.
b. Test temperature.
c. Input switching frequency.
d. Number of outputs switching.
e. Package style of devices.
f. Conditioning levels of non-switching inputs.
g. Output pin(s) to be tested.
MIL-STD-883F
METHOD 3024
19 August 1994
6
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MIL-STD-883F
METHOD 4001.1
22 March 1989
1
METHOD 4001.1
INPUT OFFSET VOLTAGE AND CURRENT AND BIAS CURRENT
1. PURPOSE
. This method establishes the means for measuring input bias current and the offset in voltage and current
at the input of a linear amplifier with differential inputs. Offset voltage may also be pertinent in some single input amplifiers.
Input bias current will also be measured in this procedure.
1.1 Definitions
. The following definitions shall apply for the purpose of this test method.
1.1.1 Input offset voltage (V
IO
). That dc voltage which must be applied between the input terminals through two equal
resistances to force the quiescent dc output to zero or other specified level V
QO
, generated by V
QI
.
1.1.2 Input offset voltage drift (DV
IO
). Input offset voltage drift is the ratio of the change of input offset voltage to the
change of the circuit temperature.
IO
IO
DV
=
V
T
∆
∆
1.1.3 Input offset current (I
IO
). The input offset current is the difference between the input bias currents entering into the
input terminals of a differential input amplifier required to force the output voltage to zero or other specified level (V
QO
).
1.1.4 Input offset current drift (DI
IO
). The input offset current drift is the ratio of the change of input offset current to the
change of circuit temperature.
IO
IO
DI
=
I
T
∆
∆
1.1.5 Input bias current (I
IB
). The input bias currents are the separate currents entering into the two input terminals of a
balanced amplifier, specified as +I
IB
and -I
IB
. The bias current in a single ended amplifier is defined as I
IB
.
1.1.6 Input offset voltage adjust (±V
IO adj
). Bias adjustment which produces maximum offset at the output.
2. APPARATUS
. The apparatus shall consist of appropriate test equipment capable of measuring specified parameters
and an appropriate test fixture with standard input, output, and feedback resistances.
3. PROCEDURE
. The test figures show the connections for the various test conditions. An op amp null loop test figure is
also shown as an alternate test setup. R
2
shall be no larger than the nominal input impedance nor less than a value which
will load the amplifier (10 x Z
OUT
). Let R
2
/R
1
= 100 or 0.1 x (open loop gain), whichever is smaller. Recommended
stabilization and power supply decoupling circuitry shall be added. R
3
shall be no larger than the nominal input impedance.
For methods using the null loop circuit, assume all switches (relays) normally closed.
3.1 Input offset voltage
.
3.1.1 Differential input amplifier
. The test setup is shown on figure 4001-1. Input offset voltage V
IO
= (R
1
/R
2
) (E
O
- V
QI
).
Switches S
1
and S
2
are closed for this test.
3.1.2 Single ended inverting amplifier
. The test setup is shown on figure 4001-2. Input offset voltage V
IO
= (R
1
/R
2
)
(E
O
- V
QI
). Switch S is closed for this test.
3.1.3 Single ended noninverting amplifier
. The test figure is shown on figure 4001-3. V
IO
= (R
1
/R
2
) (E
O
- V
QI
). Switch S is
closed for this test.
3.1.4 Differential input amplifier
. This is an alternative method using the null loop circuit of figure 4001-4, in which all
switches are closed. Set V
C
to zero. Measure E
O
. V
IO
= (R
1
/R
2
)(E
O
).