IPC-D-279 EN.pdf - 第27页

somewhat higher or lower fatigue reliability and are, on the whole, significantly less well characterized from a reliabil- ity point of view . 3.6 Plated-Through Hole and Via Reliability In surface mounting the plated-thr…

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the optimum solution (see A-2.3 and A-3.6 for explana-
tions).
3.5.1.8 Cyclic Temperature Swing The cyclic tempera-
ture swing (T) of components and substrate is the differ-
ence in the maximum and minimum steady-state tempera-
tures experienced during either externally (daily) imposed
temperature variations or operationally (on/off, load fluc-
tuations) imposed variations. It needs to be realized that the
temperature swing of the components is typically not the
same as the temperature swing of the substrate due to the
power dissipated in active devices. Smaller Ts result in
improved reliability. It needs to be noted that for some
applications the temperature swings during transport and
storage prior to operation can be more severe and a bigger
threat to reliability than the operating conditions.
3.5.1.9 Cyclic Expansion Mismatch The cyclic expan-
sion mismatch, (α∆T) results from the difference in the
thermal expansion of components and substrate which are
determined by the respective thermal expansion coeffi-
cients (CTE) and cyclic temperature swings (T). Smaller
expansion mismatches result in improved reliability.
3.5.2 Secondary Design Parameters While the effects
of secondary design parameters are, by themselves, of
second-order importance, their additional contribution to
the effects of the first-order parameters can be significant.
The effect of some of these second-order parameters might
be different in accelerated testing and actual operational
use. The effect of these secondary parameters is indirectly
included in the reliability predictions of Equations A-3 and
A-4 in Appendix A, Solder Joint Reliability, is the ‘non-
ideal’’ factor, F. This F-factor is empirically determined.
Design parameters having second-order effects on solder
joint reliability are as follows:
3.5.2.1 Solder/Base-Material CTE-Mismatch The large
CTE-mismatch (∆α) between the solder and some base
materials (ceramic, Alloy 42, Kovar, silicon) can make sub-
stantial contributions to the cyclic fatigue damage (see
A-2.3 and A-3.6).
3.5.2.2 Solder Joint Shape/Fillet/Volume Experimental
evidence indicates that solder joint shape/fillet/volume
have only secondary importance for reliability. In some
highly accelerated tests cyclic life improvements of about
a factor of two have been achieved, but it is not clear
whether even these small benefits would result for the
slower conditions prevalent in most product operations.
The improvements result from the time necessary for crack
propagation through the fillet.
Stress concentrations, e.g. from solder-mask-defined sol-
dering lands for ball grid arrays (BGAs), can reduce the
solder joint fatigue life by as much as a factor of three
depending upon the severity of the loading conditions.
3.5.2.3 Solder Joint Uniformity Some experiments in
which solder joints were loaded primarily in a stress-driven
mode (high cyclic frequencies, no hold times, very large
temperature swings with fast transitions) showed the need
for extreme uniformity of all the solder joints of a compo-
nent to avoid unequal stressing; accelerated tests utilizing
test conditions more closely resembling product use condi-
tions did not reveal a need for extraordinary solder joint
uniformity.
3.5.2.4 Initial Solder Joint Grain Structure Afine initial
grain structure in solder joints results in cyclic life
improvements of about a factor of two in highly acceler-
ated tests. The grain structure of solder is inherently
unstable and will grow with time. Higher temperatures and
cyclic loading accelerate the grain growth. Thus, for most
product applications a fine initial grain structure will not
result in a significant improvement of fatigue life; the sol-
der joints of accelerated test vehicles should be artificially
aged to start the tests with more product-related grain
structures.
3.5.2.5 Conformal Coating Conformal coating can have
different effects on solder joint life during thermal cycling
depending on the type of material, thickness, and location.
The advantage of conformal coating is that it slows the
absorption of water and oxygen into surface cracks. The
presence of oxides on the cracked surfaces may accelerate
the crack propagation. Oxidation layers prevent ‘re-
welding’’ of the solder during crack closure.
On the negative side, conformal coating may add another
material with a very high thermal coefficient of expansion
which may influence reliability. This addition can be sig-
nificant especially if the coating wicks under components,
filling the gap between the printed board and component.
In addition, conformal coating can become rigid below the
glass transition temperature. This condition can exert con-
siderable stress on the components and solder joints during
the thermal cycles.
Because of the large variation in conformal coating mate-
rial properties, thickness applied, methods of application,
etc., the effect of conformal coating, in general, needs to be
evaluated empirically for each application.
3.5.2.6 Compliant Substrate Surface Layers Compliant
layers at substrate surfaces can provide additional reliabil-
ity margins, but by themselves are not adequate to counter-
act the effects of large expansion mismatches.
3.5.2.7 Solder Composition The most widely used sol-
der compositions are eutectic (63/37) and 60/40 tin-lead
solder. Solder compositions other than these can have
July 1996 IPC-D-279
15
somewhat higher or lower fatigue reliability and are, on the
whole, significantly less well characterized from a reliabil-
ity point of view.
3.6 Plated-Through Hole and Via Reliability In surface
mounting the plated-through holes (PTHs) have been
reduced to the single function of providing electrical con-
nections through the circuit board. Because the PTH-vias
(PTVs) no longer need to be able to accept component
leads, there is no need for the traditional large PTH diam-
eters. The drive towards higher circuit board densities also
has put pressure on designers to reduce PTV diameters. At
the same time, the number of layers and, thus, the circuit
board thicknesses have been increasing. Therefore, the
PTV aspect ratio (the ratio of circuit board thickness and
drilled PTV diameter) has been increasing. The results of
an IPC round robin study (IPC-TR-579, Round Robin Reli-
ability Evaluation of Small Diameter Plated Through Holes
in PWBs) show that for PTVs with aspect ratios (AR) > 3,
special care is necessary to produce high quality PTVs.
Copper plating quality in the barrel was found to be a sig-
nificant parameter; nickel plating in the barrel increases the
robustness of the PTV to temperature cycling.
The PTVs are most stressed during temperature excursions
into the solder reflow range. For high quality PTVs five (5)
excursions to solder reflow temperatures consume about
1/6 of the available fatigue life of the PTH-via copper bar-
rels; for low quality PTH-vias the solder reflow operations
can cause PTH-via barrel fracture during manufacture. For
high quality PTH-vias the 1/6 loss of available life is not
significant; however, for applications with more severe use
conditions (see Table 3-1) this 1/6 loss of life could be a
sizeable portion of the design life.
The most important aspect of high quality PTVs is the
quality of the copper deposit in the via barrels. As the
PTV’s aspect ratio increases, it becomes more difficult to
plate high quality, uniform copper deposits inside the holes.
Special electrolytic plating formulations or electroless plat-
ing may be required.
3.7 DfR of SM Solder Attachments The material in
Appendix A gives a detailed treatment of DfR of solder
attachments.
3.8 DfR of Insulation Resistance The material in
Appendix C gives a detailed treatment of DfR with regard
to Insulation Resistance.
4.0 SUBSTRATES
This section addresses the materials related issues of sub-
strates. For printed board design and layout, see section 3.3
above.
See also IPC-D-275 for more details on rigid boards.
4.1 General Substrate Categories Interconnect sub-
strate technologies can be divided into the following cat-
egories:
1. Organic based printed wiring board
2. Discrete wiring printed board
3. Ceramic based printed circuit board (thick film,
co-fired)
4. Ceramic based printed circuit board (thin film)
Categories 1-3 above can be further classified:
Type 1—Single sided
Type 2—Double sided
Type 3—Multilayer with blind or buried vias
Type 4—Multilayer with blind and/or buried vias
Type 5—Multilayer metal-core board without blind or
buried vias
Type 6—Multilayer metal-core with blind and/or buried
vias
Type 7—Rigid-flex multilayer without blind or buried
vias (organic only)
Type 8—Rigid-flex multilayer with blind and/or buried
vias (organic only)
See Table 4-1 for the advantages and disadvantages of
common substrates.
Surface mount components are held on these substrates
with solder. The components normally have a different
CTE than the substrate; consequently, there will be
mechanical stresses on solder joints as the ambient tem-
perature changes. The cycling stress is a potential reliabil-
ity problem. To minimize this problem, packages can use
compliant leads and have the CTE matched to that of the
substrate. Substrates are also used for removal of heat.
Selected substrates must maintain their function in adverse
environmental conditions and be manufactured/assembled
at reasonable cost.
Substrates for surface mount technologies include the most
commonly used fiber glass reinforced epoxy system with
flame retardant, FR-4. The next commonly used material is
polyimide glass because of its higher temperature. Each of
the materials has its own particular characteristics and
properties and behaves differently under varying conditions
of temperature, humidity, and other stresses.
4.2 Substrates and Their Functions:
a. Power distribution;
b. Signal distribution, interconnecting lands to each
other and to the next level with acceptable signal
integrity;
c. Structural, providing a stable platform with a CTE
close enough to that of the components that sufficient
reliability under use conditions is obtained.
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For the assembly to function properly, the electrical,
mechanical, and thermal requirements of each material
used in the substrate must be considered for the operating
conditions and use environments.
Table 4-1 provides guidance in the material choices. See
IPC-D-275 for other material discussions.
4.3 Moisture and its Effects on Polymer Substrates
Polymers commonly used in SMT printed boards absorb
and adsorb water when exposed to moist atmospheres (high
relative humidity) for durations ranging from several days
to several weeks; the equilibration time depends upon the
thickness of the laminates and the geometry of the conduc-
tor pattern. The relative permittivity of water is 80 and that
of common substrates ranges from 3 to 5; the absorption of
1-3% by weight of water can significantly (but reversibly)
increase the dielectric constant between conductors and
hence the capacitive coupling between conductors, over
time. The absorption and adsorption of water also
decreases the insulation resistance between conductors at
the surface (SIR). Together with ionizable contaminants
and DC bias, condensed moisture can lead to electro-
chemical corrosion and dendrites on the surface of the sub-
strates; conductive anodic filament (CAF) formation at the
glass fiber-resin interface; and electrochemical corrosion
and dendrites at delaminations and voids such as occur
between conductors on inner layers and between barrels of
PTVs and PTHs. Moisture effects are more significant in
SM printed boards because the spaces between conductors
and the interbarrel distances are much less than the corre-
sponding dimensions in through hole printed boards; in
addition, solder masks may not be easily applied between
land patterns in the fine and extra fine pitch SM patterns.
See Appendix C for DfR information on SIR. See also
IPC-TR-476.
Some materials with higher glass transition temperatures
(T
g
) such as bismaleimides and polyimides, appear to
absorb more water than the lower T
g
materials, such as the
epoxies. Drying of the higher T
g
materials (as well as
thicker buildups of the epoxy systems) prior to SM reflow
exposure or rework/repair is recommended to minimize
delamination or separation, for instance, of the conductor
from the resin or the glass fiber from the resin.
The laminate surface is porous when treated by etching to
enhance adhesion of conductors; this surface porosity can
retain hydrolyzable and ionizable contaminants and water,
as well as hydrophilic materials such as polyglycols which
are used in the formulation of some water soluble SM sol-
der pastes. Solder mask and conformal coating materials
cover and seal the porous surface and help to retain SIR
values and reduce the risk of corrosion.
Common solder masks (and conformal coatings) are per-
meable to water vapor; the presence of water soluble con-
taminants between solder mask or conformal coating and
the underlying surface can result in vesication or mealing
and in electrochemical corrosion/migration.
Chemisorption of water into polymers appears to reduce
the T
g
slightly, reduces the adhesion of the polymer to
other materials and reduces the strength of the polymer.
See also the bibliography of IPC-SM-786.
4.4 Coefficient of Thermal Expansion (CTE) of Polymer
Systems
Polymer systems expand with increasing tem-
perature, demonstrating a glassy phase response below T
g
with a CTE or α
1
and a rubbery phase response above T
g
with a much higher α
2
, typically 3 times α
1
. The transition
from glassy phase to rubbery phase is gradual, but for most
polymer substrates may be characterized by T
g
, the glass
transition temperature.
Glass fiber reinforced substrates exhibit significantly differ-
ent CTE in the z (out of plane) axis compared to the CTE
in the x and y axes; for example, below its T
g
, Quartz/
Bismaleimide material with 35% resin by weight exhibits a
CTE(x-y) of 6 ppm/°C and a CTE(z) of 41. Woven glass
fiber reinforcement exhibits an additional difference
between x and y axes on the order of 1-5 ppm/°C; this dif-
ference may be significant where the CTE of a large SM
component package is to be matched to the CTE of the
substrate to enhance cyclic life of the solder attachments.
The CTE(z) is particularly significant in determining the
cyclic life of PTH and PTVs in SM PWAs because the
aspect ratio (ratio of substrate thickness to finished hole
diameter) is generally much larger than the corresponding
aspect ratio achieved in printed boards manufactured for
through hole technologies. Higher CTE(z) values result in
higher cyclic tensile stress in the barrel of the PTH or PTV
during temperature excursion during SM reflow, or SM
component removal/rework/repair as well as during printed
board fabrication, solder dipping, hot air leveling, or wave
solder. See IPC-TR-579 and IPC-SM-782.
The thermal cycle reliability, vibration robustness, and the
thermal management of high performance Surface Mount
(SM) products are heavily dependent upon the constraining
core such as copper-molybdenum-copper (CMC), copper-
Invar-copper (CIC) and molybdenum-graphite-
molybdenum (MGM) composite material systems.
The ratios of the various materials in those composite sys-
tems can be adjusted to tailor the effective CTE to the opti-
mum value. The tradeoffs include weight and cost. See
IPC-MC-324.
4.5 Constraining Cores in Substrates A constraining
core is an internal supporting plane in a packaging and
interconnecting structure, used to alter the coefficient of
thermal expansion of printed boards.
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