IPC-D-279 EN.pdf - 第91页

situations; the stress normally results in detection of plating porosity , but is also known to result in loss of hermeticity in sealed packages as well as loss of legibility of compo- nent marking. The pH at which this …

ESD events can also initiate ‘‘CMOS Latchup’’ with sub-

sequent electrical overstress and no evidence of ESD sus-

ceptibiilty. ESD events can induce transient currents into

neighboring circuits, causing circuit upset. Characterization

of the level of susceptibility of the component to ESD and

latchup and the design of circuitry designed to shunt ESD

energies away from susceptible components is recom-

mended. Obtain characterization data on ESD susceptibil-

ity of thin ﬁlm resistive components from the supplier;

avoid inadvertent damage to sensitive components.

Gross EOS is the cause of many resistor failures due to the

failure of some other circuit or due to a surge from an

external energy source. To reduce the failure rate of the

ﬁelded product due to EOS of resistors as well as other

components:

1. Reduce the magnitude of overstress below the cata-

strophic failure level by modifying associated cir-

cuits if possible; voltage regulators with crowbar

capability or fold-over regulation may be one

method.

2. Reduce the magnitude of consequent overstress

below the catastrophic failure level by incorporating

circuit elements such as current-limiters, voltage-

limiters, positive temperature coefficient resistors or

thermal cutouts.

3. Use resistors with higher wattage ratings; better still,

use combinations of series or parallel resistors to

spread the heat load over the printed board (lower the

power density).

4. Use resistors of more rugged materials (metal oxide)

in those situations where the resistor is intended to

take overstress without damage.

5. Use a part with an overstress failure mode of

increased resistance (or open) such as carbon compo-

sition, and NOT one which tends to decrease in resis-

tance, such as metal ﬁlm or carbon ﬁlm.

Power transistors can suffer from second breakdown (SB)

current, a possibly destructive condition which occurs

when a hot spot is created within the chip due to high

power density in a small volume. This I

current is a

function of the collector voltage and is the value of current

at which SB occurs.

E-12.0 MOISTURE AND HUMIDITY

Adsorption of water on surface of insulators with dissolu-

tion of hydrolyzable contaminants results in the subsequent

loss of Surface Insulation Resistance (SIR), particularly on

porous surfaces such as uncoated printed boards. Absorp-

tion of water in bulk of insulators with dissolution of

hydrolyzable contaminants results in the subsequent loss of

bulk moisture insulation resistance (MIR) particularly in

printed boards, dielectric ﬁlm capacitors and plastic encap-

sulated electronic components such as integrated circuits,

networks, and hybrids. Molded or conformally coated

packages can absorb water and ﬂux contaminants in solder-

ing and cleaning processes if the package is improperly

sealed particularly at the junction of the termination and

the coating; to avoid these consequences, use components

which are able to pass stringent moisture resistance tests

under conditions such as biased 85C/85% RH or biased

Highly Accelerated Stress Testing (HAST), after thermal

preconditioning simulating the soldering or reﬂow environ-

ment. Absorption of water in the bulk of the insulating film

of capacitors results in increased dissipation factor. In pres-

ence of water, the oxidation rate of oxidants such as SO

and O

is increased. In presence of water, the corrosion rate

and metal migration growth rate effects of halides such as

chloride and ﬂuoride are greatly increased. Absorption of

water by speciﬁc plastic and gasket materials (up to 1%

water by weight) results in swelling; cyclic changes in

humidity can result in ‘‘creeping’’ of the plastic or gasket

material. Very low levels of relative humidity (RH) allow

ESD voltages to build up. In the presence of water and

nutrient materials, fungus growth is increased and corro-

sive organic acids are released. Chemisorption of water

into polymers such as molding compounds results in a

lower Tg and increased total thermal expansion.

In the presence of water and electrolyte, galvanic corrosion

of metallic ﬁlms and ﬁnishes is enhanced. See Appendix L

for a tabular listing of compatible ﬁnishes. Identify and

avoid exposed galvanic couples such as terminations of

copper - nickel - gold which are sheared after plating; in

addition, exposed base metals on the edges of contacts can

lead to tarnish creep, the extension of corrosion products of

copper over the gold. Susceptible components include

ceramic packages; brazed and plated terminations may

have brazed joints of metals constituting galvanic couples,

exposed plated interfaces, and have been or need to be

trimmed and/or formed after plating. Identify mechanical

stress levels in metals (particularly formed terminations)

which might contribute to stress corrosion or plating dis-

continuities; alternatively, form metals in the annealed state

and then postplate.

E-13.0 CORROSIVE GAS AMBIENT

The result of corrosive gas ambient is material loss due to

corrosion of the metallic conductors, continuity loss due to

build up of non-conductive corrosion residues (particularly

between contacts) and loss of insulation resistance or shorts

due to build up of conductive corrosion residues. See also

temperature, humidity section above and temperature/

humidity/bias section below.

Salt atmosphere (or spray) and corrosive gas atmosphere

are both excellent source of hydrolyzable, conductive con-

tamination + water + oxygen. Salt atmosphere/spray stress

is encountered in naval electronics and required in military

systems but is not commonly encountered in commercial

July 1996 IPC-D-279

situations; the stress normally results in detection of plating

porosity, but is also known to result in loss of hermeticity

in sealed packages as well as loss of legibility of compo-

nent marking. The pH at which this test is conducted is

signiﬁcant to the test results.

E-14.0 TEMPERATURE/HUMIDITY/BIAS

The combination of the stresses, temperature, humidity,

and electrical bias, in the presence of conductive contami-

nation, particularly halides, results in electrochemical cor-

rosion and metal migration. Metallic dendrites of the com-

mon electronic metals (silver, copper, tin, lead, gold) have

been found on assemblies during high temperature/high

humidity testing; these dendrites occur on the surface of

the printed board. Dendrites are found within the bulk of

the printed board where voids allowed entrapment of con-

ductive solutions and within delaminated areas of ICs

where ﬂux residues were found. Under this combination of

stresses and where the bulk of the encapsulating material is

the source of the contamination, ICs are found to demon-

strate a time to failure described by

=(RH)

exp

(

)

where RH is the relative humidity (%), E

is the activation

energy (eV) in the range of (0.77 to 0.81 eV) and n is in

the range of -2.5 to -3.0. The RH range around 100% is

anomalous. See Appendix C .

Dendrite growth of silver, copper, lead or tin also occurs

outside and inside plastic encapsulated integrated circuits

and networks. Molding voids; internal and external pack-

age cracks at the bonding ﬁngers; manufacturing process

damage at trim and form (possible when the component

supplier process quality is inadequate); as well as delami-

nation during solder reﬂow create an ideal physical/electro-

chemical environment for dendritic growth.

E-15.0 SAND AND DUST

The results of exposure to sand - dust can include increased

friction between mating surfaces in disk and tape drives;

increased abrasion of mating plated surfaces- where the

plated surfaces form an electrical contact, contact failure

may be intermittent or complete; contaminated, abrasive

lubricants (Desert Storm demonstrated many ineffective air

and oil ﬁltering systems); clogged metering oriﬁces of air

dashpots; and clogged air ﬁlters with reduced cooling effi-

ciency.

Dusts with even slightly conductive constituents can reduce

insulation resistance and contribute hydrolyzable contami-

nants with subsequent effects noted under the moisture/

humidity section above. Highly conductive dusts have been

wiped up from the tops of dust hoods in ‘‘clean’’ factories.

E-16.0 MECHANICAL SHOCK

Mechanical shock may excite resonances in systems and

printed circuit assemblies. During surface mount technol-

ogy assembly, mechanical shock can be introduced by pick

and place machine collets; broken multilayer capacitors

and broken solder joints have resulted. During through-

hole (TH) assembly, mechanical shock may be introduced

by the TH insertion machine or by the lead trimming pro-

cess. High energy processes such as depanelizing (routing)

have resulted in displaced and broken wirebonds in inte-

grated circuits built with an open cavity around the bond-

ing wires. Peak stresses may overload or plastically deform

structures which may then fail by cracking, moving or

changing shape. Jamming or impairment of mechanical

functions may occur. Momentary disruption of electrome-

chanical functions may occur on disk drive arms, tape drive

heads, and relays; momentary opens may occur in

switches, connectors, and between components and their

associated sockets. Transportation is a source of mechani-

cal shock in service. Inappropriate use of elastomers

intended to isolate product from external sources of

mechanical energy may result in surprising damage from

energy stored in the elastomer.

E-17.0 MECHANICAL VIBRATION

Cyclic peak stress and fatigue lead to loss of strength or

material failure such as cracking, brinelling, spalling, or

displacement. Mechanical modulation of contacts (sockets,

relays, connectors, insulation displacement connection

cables...) results in momentary opens and intermittent fail-

ures such as no trouble found (NTF). Repeated ﬂexing of

materials (cables, joints, 1 piece hinges...) results in work

hardening, fatiguing and cracking. Fretting, which is

mechanical wear in localized areas due to micromotion,

results in continued generation of intermetallic compounds

in contact systems where gold plating opposes tin plating,

thinned or ruptured plating where a soft metal opposes a

hard metal or oxide, pileup of oxide and polymeric con-

tamination (particularly in the case of the platinum family

of contact materials) and subsequent increased contact

resistance and intermittent or total contact failure. Wear or

cut-through of panel coatings and cable insulation can

occur where contact occurs between insulated parts and

sharp edges. Unbalanced cooling fans may be an inadvert-

ent source of vibration.

Ultrasonically (U/S) enhanced cleaning systems have been

found to cause fatigue failure of the wire bonds in open

cavity integrated circuits where the resonant frequency of

the wire spans is close to the frequency of the ultrasonic

generator; this is probably not a cause of concern with sol-

idly molded (non-cavity) components. The vibration (cavi-

tation) of the cleaning liquid also results in erosion of the

solder joints and fatigue of component external connections

with high U/S energy densities. Fatigue and cracking of the

joint or of the component termination appears likely only

where the component termination system is mechanically

resonant near the U/S generator frequency; solder joints to

IPC-D-279 July 1996

LEDs and SOT-23 components appear to be more vulner-

able than to other components, which is likely the result of

the termination geometry. The thinner and more ductile

copper SOIC leads appear to be more resistant to U/S

induced fatigue than other terminations.

High energy repetitive assembly processes such as routing

result in both in-plane and out-of-plane vibration modes in

PWAs. In one case, accelerations on the order of 40-130

g’s have been documented, with broken wire bonds,

welded relay contacts, and broken crystal oscillator con-

nections.

It is reported that gold plated relay contacts (such as those

in reed relays) can suffer fretting corrosion during high fre-

quency mechanical stress.

E-18.0 MECHANICAL OVERLOAD

Solder joints, initially good, are subjected to mechanical

stress each time the assembly is ﬂexed, shocked, or

vibrated, for instance, TH component insertion, depaneling

(by routing, shearing or scribe/break) or testing. Bending or

ﬂexing an SMT board after it is soldered puts severe stress

on solder joints and components, as will the ‘‘straighten-

ing’’ of a warped board during insertion of the printed

board into a cardguide. Board support/retention/clamping

and vibration dampening during these operations, and

printed board design aspects such as part orientation have

been found to be techniques to minimize failed joints and

terminations. One MLCC supplier, specifying a test condi-

tion of components mounted centrally on a coupon sup-

ported on 90 mm centers, requires that X7R and Z5U

capacitors survivea2mmdeﬂection and COG capacitors

survivea3mmdeﬂection.

A simple technique was developed to predict areas of high

stress due to ﬂexure inﬂuenced by rigid components. On a

layout of the PWA, construction lines are drawn from the

corners of the rigid components (such as connectors) and

the construction line intersection deﬁnes the area of high-

est stress. Another area of high stress is the ‘‘fold-line’’ of

an ‘‘L’’-shaped printed board. TH laminated buss bars, TH

radio frequency interference (RFI) fences and PGA pack-

ages are also in this ‘‘rigid component’’ category.

Failed solder joints and components adjacent to reworked

components have occurred due to mechanical ﬂexure and

pressure stress during the component removal process.

Failed solder joints occur where connectors are assembled

without mechanical restraints to minimize rotational or

other movement of the connector relative to the printed

board. These restraints could be springy (snap-in) detents

(for wave soldering), rivets or screws (for hand soldering

or possibly posts secured by heat-staking or ultrasonic

deformation). Note that this is an order ranking from a

Design For Assembly/Manufacturability (DfA/M) view-

point.

E-19.0 EM SUSCEPTIBILITY, RADIATION,

INTERFERENCE

If electromagnetic (EM) energy is induced in the traces

associated with integrated circuits inputs or outputs, the

results may be manifested as intermittent failure or second-

ary EOS. CMOS latchup may be initiated. The higher

clock rates and faster transition times associated with the

higher speed ICs can result in more EM energy generated

and radiated from the product. The radiated energy may be

gathered by other circuits or products and become an inter-

fering signal. See also the literature on ESD, EMI, EM

Control.

E-20.0 LOW ATMOSPHERIC

PRESSURE/HIGH ALTITUDE/VACUUM

These stresses result in the expansion or explosion of gases

in voids, resulting in overstressed sealed containers, pack-

ages and cavities (the ‘‘blowing’’ of liquid electrolytic

capacitors vent plugs falls into this category); decreased air

density and less efficient cooling (assemblies and systems

may overheat, fuses with leaky seals will tend to open pre-

maturely); decreased air density and decreased dielectric

strength (initiation of corona, arcing and insulation break-

down with subsequent thermal and ozone damage as well

as sprayed conductive materials, voltage breakdown and

leakage in relays and connectors and other open [unsealed]

conductors). ‘‘Sealed’’ cavity components may lose air and

suffer the consequences of reduced gas dielectric strength.

E-21.0 IONIZING RADIATION

The most common source of ionizing radiation has been

the outer package material (ceramic or plastic molding

compound) of dynamic random access memories

(DRAMs) where alpha particles are emitted by the heavy

metals, such as uranium or thorium in the ceramic or oxide

constituents; the alpha particles are absorbed by the storage

elements of the DRAM and contribute electronic charge to

the storage elements. This additional charge, on the order

of one million hole-electron pairs per particle, can result in

soft errors. Relatively thick layers of pure organic materi-

als, such as polyimide, can ‘‘stop’’ the alpha particle from

penetrating the silicon; unfortunately, these ‘‘stopping’’ lay-

ers can contribute to delamination of the molding com-

pound from the surface of the protected die and subsequent

corrosion.

Transient leakage currents and possible EOS can result if

the energy of X-rays from a cathode ray tube is sufficient

to penetrate the outer system package and the component

package. See also CMOS Latchup.

Visible light is normally blocked by electronic component

packaging; however, there are instances where light pen-

etrates the packaging material, is absorbed in a semicon-

ductor junction and contributes hole-electron pairs; opto-

couplers and photodetectors in plastic packages are

July 1996 IPC-D-279