IPC-D-279 EN.pdf - 第73页
DC voltage gradients, since electronic circuitry is most prone to CAF formation under these condi- tions; 7) A void testing conditions which create failure mecha- nisms and failure modes which will not be observed during…
1nIR = 1nIR
∞
+
E
T
kT
−
RH
100
E’
RH
kT
epx
[
E’’
RH
kT
]
= 1n 3.7x10
−29
+
2.51
kT
−
RH
100
0.31
kT
exp
[
0.12
kT
]
(Eq. C-10)
where
IR∞= an empirical constant interpreted as the insulation
resistance of the test sample at infinite tempera-
ture and zero humidity,
E
T
= the activation energy for the temperature depen-
dence, and
E’
RH
,E’’
RH
= activation energies for the humidity
dependence in eV
k = 8.62x10
-5
eV/°K
The form of Eq. C-10 is the consequence of the fact that
the driving parameter, the vapor pressure of water, p
v
,is
dependent on temperature. The relationship of the vapor
pressure of water with RH can be approximated in the
temperature range from 0 to 75°C by
p
v
=
RH
100
exp
[
16.82 −
5250
T[K]
]
(Eq. C-11)
Under the assumption that the effects of temperature and
humidity are independent of each other and that the rela-
tionships can be validly extrapolated, the expected life can
be calculated from results of the accelerated tests using an
acceleration factor, A.F., using
A.F. = exp
[
E
a
k
(
1
T
life
−
1
T
test
)
− C(RH
b
life
− RH
b
test
)
]
(Eq. C-12)
where the subscript ‘life’ refers to the normal operating
conditions and the subscript ‘test’ to the accelerated test
conditions.
The failure mechanism is highly temperature dependent
with activation energies, E
a
, variably reported as a very
low 0.02 eV for some samples below 60°C and 0.6 to 2.5
eV for all samples above 60-65°C [Ref. C-7: 15], 0.6 eV
[Ref. C-7: 14], 0.9 eV [Ref. C-7: 8] and 2.51 eV [Ref. C-7:
1].
The value of C associated with humidity can be taken from
Eq. C-10 with b=l; for b=2 and RH expressed in percent C
has been reported as 4.4x10
-4
[Ref. C-7: 14].
C.2.2 Conductive Anodic Filament Failure The determi-
nation of the mean-time-to-failure (MTTF) for the CAF
failure mode is more complicated.
The CAF-MTTF is not only dependent temperature,
humidity, and bias voltage, but also on the PCB materials
[Refs. C-7: 8,16], and the quality of the manufacturing
processes, particularly drilling [Ref. C-7: 11].
Further, preconditioning in terms of both thermal shock
[Ref. C-7: 17] and exposure to high humidity [Refs. C-7:
11,17] has been observed to reduce CAF-MTTF. There
appears to be a two-step process in which pre-conditioning
at an accelerated relative humidity will reduce the time for
CAF failure to occur once voltage is applied. (1) Moisture
absorption by the substrate leads to interfacial degradation
at the glass/epoxy interfaces. This interfacial degradation
can also be enhanced by prior thermal cycling, thermal
shock or, by mechanical stresses. (2) Electro-chemical cor-
rosion and oxidation of Cu to Cu
n+
creates the ions which
migrate under a bias voltage. The time to failure can be
expressed as the sum of these two steps
t
F
=t
1
+t
2
(Eq. C-13)
Studies where the application of the bias voltage was
delayed indicate that t
1
»t
2
[Ref. C-7: 10].
There is evidence of a threshold relative humidity below
which this degradation mode will not be observed. It has
been proposed that for a given voltage, V, and a tempera-
ture T, the relative humidity, in percent, corresponding to a
constant failure probability is [Ref. C-7: 7]
RH =
[
2.3975 + 1n (c)+
0.9
kT
− 1.52 1n (V)
5.47
]
(Eq. C-14)
where
c = 6.9x10
-4
for a failure probability of 0.5%.
C-3.0 DfR-PROCESS
For insulation resistance, DfR should perhaps stand for
‘Design for Robustness’ rather than ‘Design for Reliabil-
ity,’ because reliability assurance implies some numerical
certitude which is not attainable in this context.
Thus, a successful DfR-process is one that assures the
highest level of robustness that is practically and economi-
cally achievable. This requires that a number of issues be
addressed at the design stage. The generally applicable
guidelines to maximize robustness are:
1) Keep conductor lines and spaces on the printed
board as wide as possible;
2) Provide a controlled operating environment;
3) Conformally coat electronic product if it is subject to
temperature fluctuations such that condensation can
occur (the degree of protection will depend on both
the type and method of application of the coating);
4) Provide a controlled storage environment;
5) Avoid water-soluble fluxes and fusing fluids contain-
ing polyglycols for high humidity operating environ-
ments and high DC voltage gradients, since some of
these fluxes have been implicated in enhanced CAF
formation;
6) Utilize CAF-resistant PCB materials for assemblies
with high humidity operating environments and high
July 1996 IPC-D-279
61
DC voltage gradients, since electronic circuitry is
most prone to CAF formation under these condi-
tions;
7) Avoid testing conditions which create failure mecha-
nisms and failure modes which will not be observed
during normal operating life and use conditions.
C-4.0 CRITICAL FACTORS FOR EMERGING ADVANCED
TECHNOLOGIES
The emerging advanced technologies are characterized by
denser packaging resulting in ever finer conductor line
widths and spacings. Without changes in the material and
the operating environment, which for economical and prac-
tical reasons are not likely, finer lines and spacings result
in reduced insulation resistance and increased threat of
CAF formation. The DfR principles listed in Section C-3.0
need to be kept in mind in the design and application of
these emerging technologies.
C-5.0 VALIDATION AND QUALIFICATION TESTS
C-5.1 SIR Test Procedures
The most commonly used
test vehicle for measuring SIR is an interdigitated comb
pattern. These patterns exist in a variety of configurations
with spacing between conductors ranging from 0.15 mm to
1.25 mm. SIR tests are carried out at elevated temperature
and humidity levels; however, some tests are performed
with a bias voltage applied throughout the duration of the
test, while others are performed without electrical bias
being applied.
Bias voltages applied during testing ranges from 10 V to as
much as 500 V. Periodically a test voltage of typically 100
V, for the electrically biased tests with reversed polarity, is
applied to measure the insulation resistance. In the case of
the electrochemical migration tests required by Bellcore
[Ref. C-7: 18] the bias voltage and the test voltage have the
same polarity.
SIR tests are normally performed at accelerated conditions
with elevated temperature and humidity levels. The test
conditions range from 35°C/95%RH to 85°C/85%RH with
test durations varying from 100 to 500 hours. Pass criteria
also vary from 100 MΩ to 200 MΩ. The electrochemical
migration test requires that any decline in insulation resis-
tance be less than a decade for the sample to pass. Table
C-1 compares the variation in the test conditions for the
IPC SIR test [Ref. C-7: 19] for soldering flux and the
Bellcore SIR and migration tests [Ref. C-7: 14].
The variation in the test parameters, as illustrated in Table
C-1, results in a large variation in observed SIR data. As
indicated previously, the insulation resistance is an extrin-
sic property of the material sample under investigation.
This property will be affected by the test pattern, tempera-
ture, humidity, bias voltage and duration chosen for the test
as well as the contamination associated with prior process-
ing steps. This contamination may result in electrochemical
corrosion.
SIR readings are sensitive to and affected by a number of
factors.
The variation in the test parameters, as illustrated in Table
C-1, results in a large variation in observed SIR data. As
indicated previously, the insulation resistance is an extrin-
sic property of the material sample under investigation.
This property will be affected by the test pattern, tempera-
ture, humidity, bias voltage and duration chosen for the test
as well as the contamination associated with prior process-
ing steps. This contamination may result in electrochemical
corrosion.
SIR readings are sensitive to and affected by a number of
factors.
C-5.1.1 Factors Affecting SIR Readings
Geometry
The geometry of the test pattern is of primary
importance. When a bias voltage is applied, an interdigi-
tated comb pattern experiences a distributed resistance due
to the number of parallel traces over which the measure-
ment is taken. The length of the interacting conductors
divided by the separation between conductors is defined as
the number of squares. In comparing data from two differ-
ent comb patterns, the readings are sometimes reported as
ohms/square.
Humidity When a monolayer of water is absorbed onto
the surface of an epoxy/glass printed board, the water mol-
ecules hydrogen-bond to the epoxy making them essen-
tially immobile. These hydrogen-bonded water molecules
can exist as either continuous coatings or as discrete
islands [Ref. C-7: 20]. As subsequent water layers are
added, thicker films are formed allowing the dissolution of
contaminants and the formation of hydrated ions which can
move under the influence of an electric field [Ref. C-7: 21].
Conductivity measurements made on aluminum oxide
revealed that for films with thicknesses of less than three
(3) monolayers, the surface conductivity is two orders of
magnitude below that of bulk water [Ref. C-7: 22]. The
surface conductivity increased asymptotically with the
increase in the number of monolayers with equilibrium
being reached above 20 monolayers. Evidence indicates
that there is a critical relative humidity at which a com-
pound exhibits a surge in moisture absorption [Ref. C-7:
23,24]. For example, it has been demonstrated that den-
dritic growth of gold on alumina surface is dependent upon
the relative humidity and that there existed a threshold for
gold migration to occur [Ref. C-7: 25]. It has been shown,
that the critical relative humidity for epoxy coatings is 70%
and that the epoxy degrades over time when exposed to
humid environments [Ref. C-7: 26].
IPC-D-279 July 1996
62
Contamination The presence of contamination on the sur-
face will increase the moisture absorption. The critical rela-
tive humidity can be lowered by the presence of contami-
nants. The nature of these contaminants will determine how
much moisture is absorbed at a given humidity level. If
these contaminants are ionic in nature, they can enhance
electrochemical reactions that occur in the presence of a
bias voltage.
Voltage The bias voltage applied across the insulator will
set-up a response in the dipolar polymer substrate. In per-
forming SIR testing, it is important that the bias voltage
chosen is realistic as it relates to the actual operating and
use conditions of the electronic assembly. Typical test
methods require 45-50 V bias because this represents a
moderate accelerating condition relative to the +/- 15 V
circuits common in telecommunication hardware. Exces-
sively high voltage tests for routine circuits can lead to
damage mechanisms and failure not representative of pro-
duct use.
C-6.0 SCREENING PROCEDURES
For the threats to reliability from low SIR and CAF forma-
tion no effective screening procedure exists. The best that
can be done is following the DfR recommendations in Sec-
tion C-3.0 and the testing of representative samples using
the test procedures discussed in Section C-5.0.
C-7.0 REFERENCES
1. Engelmaier, W., ‘‘On the Parametric Temperature/
Humidity Dependence of Insulation Resistance of
Covercoated Fine-Line Flexible Printed Wiring,‘‘ Proc.
Nat, Electronic Packaging and Production Conf,
(NEPCON West), Anaheim, CA. February 1976, p. 87.
2. ‘‘D-C Resistance or Conductance of Insulating Materi-
als,’’ ASTM D 257-78. Annual Book of ASTM Stan-
dards, ASTM, Philadelphia, PA.
3. Gorondy, E. J., ‘‘Surface Insulation Resistance Part I:
The Development of an Automated SIR Measurement
Technique,‘‘ IPC Technical Paper IPC-TP-518, The
Institute for Interconnecting and Packaging Electronic
Circuits, Lincolnwood, IL, September 1984.
4. Zado, F. M., ‘‘Effects of Non-Ionic Water Soluble Flux
Residue,’’ Western Electric Engineer, Vol. 1, No. 1,
1983.
5. Kawanobe, T., and K. Otsuka, ‘‘Metal Migration in
Electronic Components,’’ Proc. 32nd Electronic Com-
ponents Conf., San Diego, CA, May 1982, pp. 220-
228.
6. Uhlig, H. H. ‘‘Corrosion and Corrosion Control,’’ 2nd
ed., John Wiley & Sons, Inc., New York, NY, 1971,
p.322.
7. Lando, D. J., J. P. Mitchell, and T. L. Welsher, ‘‘Con-
ductive Anodic Filaments in Reinforced Polymeric
Dielectrics: Formation and Prevention,’’ Proc. 17th
Ann. Reliability Physics Symp., April 1979, pp. 51-63.
8. Augis, J. A., D. G. DeNure, M. J. LuValle, J. P. Mitch-
ell, M. R. Pinnel, and T. L. Welsher, ‘‘A Humidity
Threshold for Conductive Anodic Filaments in Epoxy
Glass Printed Wiring Boards,’’ Proc. 3rd Int, SAMPE
Electronics Conf.. June 20-22, 1989, pp. 1023-1030.
9. Ready, W. J., S. R. Stock, and L. J. Turbini, unpub-
lished results.
10. Turbini, L. J., unpublished work.
11. Cotter, M., and W. Engelmaier, unpublished results.
12. LuValle, M. J., T. L. Welsher, and J. P. Mitchell, R. J.,
‘‘A New Approach to the Extrapolation of Accelerated
Life Test Data,’’ Proc. 5th Int. Reliability and Main-
tainability Conf., Biarritz, France, 1986, pp. 630-635.
Table C−1 SIR Test Parameters for Some Industry Tests
Parameters
IPC-TM-650
Solder Flux
Bellcore
SIR
Bellcore
Electromigration
Test Voltage 100 V 100 V 45 to 100V
Bias Voltage 50 V 50 V 10 V
Polarity Reverse Reverse Same
Environment 85°C/85%RH 35°C/85%RH 85°C/85%RH
Duration 7 days 4 days 500 hours
Lines/Spacing 0.4/0.5 mm 0.64/1.27 mm
0.32/0.32 mm
0.32/0.32 mm
Number of Squares ~1000 ~100
~500
~500
Failure Criteria 100 MΩ 10
5
MΩ
2x10
4
MΩ
SIR less than 1 decade
decline
July 1996 IPC-D-279
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