IPC-D-279 EN.pdf - 第6页

5.3 Package Lead Configuration Selection ............ 20 5.3.1 Gull W ing Components ..................................... 20 5.3.2 J-Lead Components ........................................... 20 5.3.3 Pin Grid Arrays ..…

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Table of Contents
1.0 SCOPE...................................................................... 1
1.1 Purpose................................................................. 1
1.2 Design Philosophy............................................... 1
1.2.1 Establishing the Design Team............................. 1
1.2.2 Defining Reliability Requirements...................... 1
1.2.3 Understanding the Product Life Cycle................ 1
1.2.4 Defining the Product Environment...................... 2
1.3 Document Organization....................................... 2
1.3.1 Applicable Documents......................................... 2
1.3.2 Design for Reliability of SM Assemblies........... 2
1.3.3 Substrates ............................................................. 2
1.3.4 Components.......................................................... 2
1.3.5 Attachment Materials and Coatings.................... 2
1.3.6 Assembly Processes and DfM............................. 2
1.3.7 Testing.................................................................. 3
1.4 Terms and Definitions.......................................... 3
2.0 APPLICABLE DOCUMENTS .................................. 5
2.1 Institute for Interconnecting and Packaging
Electronic Circuits (IPC)..................................... 5
2.2 Electronic Industries Association ....................... 5
2.3 Joint Industry Standards...................................... 5
3.0 DESIGN FOR RELIABILITY FOR SURFACE
MOUNT ASSEMBLIES
............................................. 5
3.1 Life Cycle Environment...................................... 5
3.1.1 Manufacturing Processes..................................... 5
3.1.2 Processing Temperature Excursions.................... 5
3.1.3 Burn-In and Environmental Stress Screening
(ESS).................................................................... 6
3.1.4
Transport .............................................................. 6
3.1.5
Storage.................................................................. 6
3.1.6
Use Environments................................................ 6
3.1.7
Environmental Stresses........................................ 7
3.1.8
Temperature/Thermal........................................... 7
3.1.9
Cyclic Temperature Swings................................. 7
3.1.10
Thermal Shock..................................................... 7
3.1.11
Electrical ............................................................. 8
3.1.12
EMC/EMI............................................................. 8
3.1.13
Mechanical Shock and Vibration ........................ 8
3.1.14
Insulation Resistance .......................................... 9
3.1.15
Solvent Compatibility........................................ 10
3.1.16
Corrosion............................................................ 10
3.1.17
External Radiation ............................................. 10
3.1.18
Space Environment............................................ 10
3.2
Thermal Design.................................................. 10
3.3 Printed Board Design and Layout..................... 10
3.3.1 Thermal Design and Layout.............................. 11
3.3.2 Thermal Design and Conformal Coating.......... 11
3.3.3 Land Patterns ..................................................... 11
3.3.4 Balance About Neutral Axis.............................. 11
3.3.5 Vias..................................................................... 11
3.3.6 Printed Board Trace Widths and Spaces........... 11
3.3.7 PTH and PTV Thermal Isolation/Relief ........... 12
3.3.8 Test Pads ............................................................ 12
3.3.9 Spacing Between Parts...................................... 12
3.3.10 ‘Pads-Only’’ Design.......................................... 12
3.3.11 Components with Reduced Clearances
(Traces Under) ................................................... 13
3.3.12 Components with Reduced Clearance and
Open Vias........................................................... 13
3.4 Coefficient of Thermal Expansion (CTE)
and CTE-Mismatch............................................ 13
3.5 Solder Joint Reliability...................................... 14
3.5.1 Primary Design Parameters............................... 14
3.5.2 Secondary Design Parameters........................... 15
3.6 Plated-Through Hole and Via Reliability ......... 16
3.7 DfR of SM Solder Attachments........................ 16
3.8
DfR of Insulation Resistance ............................ 16
4.0 SUBSTRATES ........................................................ 16
4.1
General Substrate Categories ............................ 16
4.2
Substrates and Their Functions:........................ 16
4.3 Moisture and its Effects on Polymer
Substrates ........................................................... 17
4.4 Coefficient of Thermal Expansion (CTE) of
Polymer Systems................................................ 17
4.5
Constraining Cores in Substrates...................... 17
4.5.1
Printed Board Stiffness and Damping............... 19
4.6 Flexible Printed Board with Metal
Support Plane..................................................... 19
4.7 Discrete Wire Structures with Metal Support
Plane................................................................... 19
4.8
Outgassing of Polymer Substrates .................... 19
4.9 Assembly Process Effects on Polymer
Substrates ........................................................... 19
4.10
Printed Board Solderability............................... 19
4.11 Design for Reliability of Plated-Through-Hole
Vias (PTVs)........................................................ 19
5.0 GENERAL COMPONENT SELECTION
CONSIDERATIONS
................................................ 19
5.1
Component Selection Strategy.......................... 20
5.2
Package Leadframe and Local Materials.......... 20
July 1996 IPC-D-279
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5.3 Package Lead Configuration Selection ............ 20
5.3.1 Gull Wing Components..................................... 20
5.3.2 J-Lead Components ........................................... 20
5.3.3 Pin Grid Arrays.................................................. 20
5.3.4 Fine Pitch Components...................................... 20
5.3.5 Plastic Surface Mount Components
(PSMC) .............................................................. 21
5.3.6 Component Termination Coplanarity and
Configuration...................................................... 21
5.3.7 Component Lead Configuration........................ 21
5.4 Component Termination Finishes...................... 21
5.4.1 Nickel Barrier Layer.......................................... 21
5.4.2 Tin and Tin-Lead Solder Termination
Finishes .............................................................. 21
5.4.3 Termination Recommendations When Using
Electrically Conductive Adhesives.................... 22
5.4.4 Gold, Palladium, Silver Termination Finishes.. 22
5.5 Solderability of Termination Finishes............... 22
5.6 Soldering Considerations................................... 22
5.7 CTE Mismatch Considerations.......................... 22
5.8 ESD Packaging Requirements........................... 23
5.9 Specials or Custom Devices Use Precaution.... 23
5.10 Components to Avoid or to Use with
Caution .............................................................. 23
5.11 Component Selection Considerations for
Military and Space Applications....................... 23
6.0 SOLDER MASK AND CONFORMAL COATING
CONSIDERATION
.................................................. 23
6.1 Solder Mask Considerations for SM................. 23
6.1.1 Solder Mask Selection....................................... 24
6.1.2 Solder Mask Thickness Issues........................... 24
6.2 Temporary Solder Mask and Tapes................... 24
6.3 Conformal Coatings........................................... 24
7.0 ASSEMBLY PROCESSES AND DESIGN FOR
MANUFACTURABILITY
......................................... 24
7.1
Solder Paste Application.................................... 26
7.2
Adhesive Application......................................... 26
7.3
Component Placement....................................... 26
7.4
Soldering............................................................ 27
7.4.1
Solder Paste Reflow........................................... 27
7.4.2
Wave Soldering.................................................. 27
7.5
Cleaning ............................................................. 27
7.6
Rework/Repair ................................................... 27
7.7
Depaneling ......................................................... 28
7.8
Design for Manufacturability ........................... 28
7.8.1
Components........................................................ 28
8.0 TESTING................................................................. 28
8.1
Design for Testability (DfT).............................. 29
8.2 Testing Philosophy............................................. 29
9.0 REFERENCE DOCUMENTS ................................ 29
9.1 General Books on SMT Process and Design .. 29
9.2 SMT Soldering Process Technical Details........ 30
9.3
SMT Solder Paste.............................................. 30
9.4
SMT Cleaning.................................................... 30
9.5
Solder Joint Reliability...................................... 30
9.6 Design of Electronic Packages and
Packaging .......................................................... 30
9.7 EMC, High Speed Transients and Electrical
Overstress........................................................... 31
9.8
ESD.................................................................... 31
9.9
Scanning Acoustic Microscopy ........................ 31
9.10
Plastic Package Cracking .................................. 31
9.11
Solder Joint Metallurgy and Etching................ 31
9.12
PWA Thermal Design........................................ 31
9.13
Substrate Fabrication Information..................... 32
9.14 Component Derating, Applications,
Qualification....................................................... 32
9.15
Testability, Manufacturability............................ 32
9.16
Vibration, Shock ................................................ 32
9.17
Accelerated Life Testing.................................... 33
9.18 Solder, Solderability, Soldered Assembly
Quality................................................................ 33
9.19
Solder Mask and Conformal Coating ............... 33
9.20
General Reliability............................................. 33
Appendix A Design for Reliability (DfR) of Solder
Attachments
A-1.0 SURFACE MOUNT SOLDER ATTACHMENT
RELIABILITY
...................................................... 34
A-2.0 DAMAGE MECHANISMS AND FAILURE......... 34
A-2.1
Solder Joints and Attachment Types................. 34
A-2.2
Global Expansion Mismatch ............................. 36
A-2.3
Local Expansion Mismatch............................... 36
A-2.4
Internal Expansion Mismatch............................ 36
A-2.5
Solder Attachment Failure................................. 36
A-3.0 RELIABILITY PREDICTION MODELING.......... 36
A-3.1
Creep-Fatigue Modeling.................................... 36
A-3.2
Damage Modeling.............................................. 37
A-3.3
CAVEAT 1 Solder Joint Quality.................. 38
A-3.4 CAVEAT 2 Large Temperature
Excursions.......................................................... 38
A-3.5 CAVEAT 3 High-Frequency/
Low-Temperatures ............................................. 39
A-3.6
CAVEAT 4 Local Expansion Mismatch...... 39
A.3.7 CAVEAT 5 Very Stiff Leads/Very Large
Expansion Mismatches ..................................... 40
IPC-D-279 July 1996
iv
A.3.8 Statistical Failure Distribution and Failure
Probability.......................................................... 40
A-3.9
Multiple Cyclic Load Histories......................... 41
A-3.10
System Reliability Evaluation........................... 41
A-4.0 DfR-PROCESS ................................................... 42
A-5.0 CRITICAL FACTORS FOR EMERGING
ADVANCED TECHNOLOGIES
.......................... 42
A-5.1
Flip Chip on Laminate ...................................... 42
A-5.2
Area Arrays (BGA, CGA)................................. 43
A-5.3
Thin Packages (TSOP)...................................... 43
A-6.0 VALIDATION AND QUALIFICATION TESTS.... 44
A-7.0 SCREENING PROCEDURES ............................ 44
A-7.1
Solder Joint Defects........................................... 44
A-7.2
Screening Recommendations............................. 45
A-8.0 STEP-BY-STEP NUMERICAL EXAMPLE
RELATING REQUIRED DESIGN LIFE TO
ACCELERATED RELIABILITY TEST
RESULTS
............................................................ 45
A-9.0 REFERENCES.................................................... 47
Appendix B Design for Reliability (DfR) of
Plated-Through Via (PTV) Structures
B-1.0 PLATED-THROUGH VIA (PTV) RELIABILITY
ISSUES
............................................................... 50
B-1.1
Copper Plating Process...................................... 50
B-1.1.1
Acid Copper Plating.......................................... 50
B-1.1.2
Pyrophosphate Copper Plating.......................... 51
B-1.2
Material Properties............................................. 51
B-1.2.1
Tensile Properties............................................... 51
B-1.2.2
Ductility.............................................................. 51
B-1.2.3
Fatigue Behavior................................................ 51
B-1.3
Damage Mechanisms and Failure..................... 52
B-1.3.1
PTV Quality....................................................... 52
B-1.3.2 Impact of Assembly Processes and ESS
Procedures.......................................................... 53
B-1.3.3 Impact of Test Procedures and Cyclic
Operating Environments.................................... 54
B-2.0 RELIABILITY PREDICTION MODELING.......... 54
B-3.0 DfR-PROCESS ................................................... 56
B-4.0 CRITICAL FACTORS FOR EMERGING
ADVANCED TECHNOLOGIES
.......................... 57
B-5.0 VALIDATION AND QUALIFICATION TESTS.... 57
B-6.0 SCREENING PROCEDURES ............................ 57
B-7.0 REFERENCES.................................................... 57
Appendix C Design for Reliability (DfR) of Insulation
Resistance
C-1.0 INSULATION RESISTANCE DAMAGE
MECHANISMS AND FAILURE
.......................... 59
C-1.1
Surface Insulation Resistance (SIR).................. 59
C-1.2
Electrochemical Corrosion ................................ 59
C-1.3
Dendrite Growth................................................ 60
C-1.4
Conductive Anodic Filaments (CAF)................ 60
C-2.0 INSULATION RESISTANCE MODELING.......... 60
C-2.1
Insulation Resistance Degradation .................... 60
C.2.2
Conductive Anodic Filament Failure ................ 61
C-3.0 DfR-PROCESS ................................................... 61
C-4.0 CRITICAL FACTORS FOR EMERGING
ADVANCED TECHNOLOGIES
.......................... 62
C-5.0 VALIDATION AND QUALIFICATION TESTS.... 62
C-5.1
SIR Test Procedures........................................... 62
C-5.1.1
Factors Affecting SIR Readings Geometry....... 62
C-6.0 SCREENING PROCEDURES ............................ 63
C-7.0 REFERENCES ................................................... 63
Appendix D Thermal Considerations
D-1.0 GENERAL
........................................................... 65
D-2.0 THERMAL ANALYSIS AT THE DEVICE
LEVEL
................................................................. 65
D-2.1 The Ambient Temperature of an Electronic
System (T
a
)........................................................ 65
D-2.2 The Temperature Rise of the Cooling Agent
at the Device Level (T
CA
)............................... 66
D-2.3 The Temperature Rise Inside the Device
Boundary Layer (T
BL
)..................................... 66
D-2.4 The Temperature Rise Inside the Device
Package (T
P
).................................................... 66
D-2.5
Thermal Wake (T
TW
) ...................................... 66
D-3.0 DETERMINING THE SOLDER JOINTS
TEMPERATURE SWINGS
.................................. 66
D-4.0 COOLING OF ELECTRONIC EQUIPMENT...... 67
D-4.1
Radiation............................................................ 67
D-4.2
Free Convection................................................. 67
D-4.3
Direct Forced Convection.................................. 67
D-4.4
Conduction Cooling........................................... 67
D-4.5
Heat Pipes.......................................................... 67
D-4.6
Direct Liquid Cooling........................................ 68
D-4.6.1
Direct Natural Convection Liquid Cooling ...... 68
D-4.6.2
Direct Forced Liquid Cooling........................... 68
D-5.0 PRODUCT THERMAL DESIGN......................... 69
July 1996 IPC-D-279
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