IPC-D-279 EN.pdf - 第94页

Appendix F Components Some SM component packages require special mention: F-1.0 CERAMIC LEADLESS CHIP CARRIER (CLLCC) Printed board material of high Tg and low CTE may be required to meet the reliability target. F-2.0 ME…

susceptible to light induced leakage, noise and

malfunction.

E-22.0 SOLVENTS

Exposure of components and assemblies to various sol-

vents (not normally considered a ‘‘stress’’) during assem-

bly and repair operations can result in the following

scenarios:

• loss of lubricant with subsequent accelerated wear,

particularly in variable resistors and capacitors and in

switches

• absorption and diffusion through polymeric seals with

subsequent corrosion, particularly in aluminium

capacitors when halogenated solvents, such as CFCs,

have been used

• dissolution of some wire insulation ‘‘varnish,’’ mark-

ing inks and label adhesives with subsequent contami-

nation of the cleaning system, loss of the insulation

function, or loss of identity

• dissolution or softening of plastics such as polycarbon-

ate and polystyrene, even when low activity solvents

such as CFCs have been used, solvation effects are

exacerbated when solvent blends containing methylene

chloride are used

• and absorption and deformation of silicone rubber

parts and seals in CFCs.

Because CFC based solvents are being replaced by other

solvents due to concern over ozone depleting effects, great

care must be exercised in the replacement process. For

instance, cleaning of SMT boards with a ‘‘plug in compat-

ible’’ solvent prior to paste application has been found to

greatly increase the frequency of ‘‘solder balls’’ apparently

due to chemical reactions between the thermal decomposi-

tion products of the solvent and the tin in the solder during

the soldering process. The composition, location and quan-

tity of the residual contamination will also change with

changes in the solvent.

The very high velocity solvent sprays used in the ﬂux

removal systems designed to achieve very clean PWAs par-

ticularly in SMT are intended to clean under and between

components which are tightly ﬁtted together. Marginal

‘‘O’’-ring seals may succumb.

IPC-D-279 July 1996

Appendix F

Components

Some SM component packages require special mention:

F-1.0 CERAMIC LEADLESS CHIP CARRIER (CLLCC)

Printed board material of high Tg and low CTE may be

required to meet the reliability target.

F-2.0 METAL ELECTRODE FACE BONDED (MELFs)

Metal electrode face bonded (MELFs) require either spe-

cial ‘‘U’’ shaped land patterns or adhesive to retain position

during reﬂow.

F-3.0 SPACING ABOVE BOARD

The maximum height of printed board mounted devices

must be considered during the planning stage of the design.

Clearance restrictions may include the housing or enclosure

proposed for the ﬁnished product or in the case of rack

mounted printed boards, line-to-line clearance between

components of one board and the surface of the parallel

mounted assembly.

Assembly systems have clearance limitations as well. Most

lower proﬁle devices are mounted in the ﬁrst stage of the

assembly process with higher proﬁle devices added at a

later time. For excessively high proﬁle devices, transform-

ers and large connectors for example, post assembly attach-

ment is required.

F-4.0 ALL SM PICK AND PLACE FEEDER PARTS

Sensitive or not, if they are dispensed adjacent to electro-

static discharge susceptible (ESDS) components, should be

packaged in antistatic materials.

F-5.0 COMPONENTS WITH RUBBER SEALS

Should not be used with halogenated solvents or chemicals

during production assembly, rework, ﬁeld repair. This

avoids internal corrosion caused when the halogens diffuse

through the rubber seal. Aluminum electrolytic capacitors,

when used, should be epoxy sealed. The rubber seal in

rotary or slide components such as potentiometers and

switches can deform or degrade under SM reﬂow tempera-

tures. This seal can also allow intrusion of liquid during

high pressure or high velocity spray cleaning.

F-6.0 PLASTIC SM COMPONENTS, MOISTURE, AND SM

REFLOW PROCESSING

Plastic encapsulated surface mount components (PSMC)

can suffer from thin ﬁlm stress, delamination and cracks

during SM reﬂow processing. These defects can lead to

dendrites, thin ﬁlm cracking (TFC), damaged bonds, bond

pad cratering and corrosion, resulting in product failures

due to opens and shorts of either a permanent or intermit-

tent nature. The SM solder reﬂow process and, in some

cases, the high junction temperatures associated with

CMOS latch-up, causes absorbed moisture in the PSMCs

to rapid convert to steam, causing the plastic to separate or

delaminate from the die surface and inducing stress at this

interface. During accelerated life testing under biased

85°C/85% RH conditions, one major computer maker

noted a 50% decrease in MTBF on delaminated or cracked

packages compared to defect free packages.

Similar failure mechanisms affecting PSMCs during SM

reﬂow include voids and delamination resulting from the

reﬂow and expansion of internal solder joints and expan-

sion of coatings and potting compound, such as those

found in networks of passive components such as capaci-

tors, resistors, and delay lines. Also found in PSMCs are

cracking and bursting of the outer plastic housing in com-

ponents such as pulse transformers due to thermal expan-

sion of the stress-relieving silicone conformal coating.

These effects are in addition to any delamination of the

silicone from the epoxy potting compound. The CTE of the

silicone is on the order of 300 ppm/°C.

PSMC packages which contain integrated circuits (IC),

resistor networks and capacitor networks are generally

molded in an epoxy-based compound which contains silica

and other ﬁllers and additives which help control the coef-

ﬁcient of thermal expansion (CTE), adhesion of the mold-

ing compound (MC) to the various elements within the

package (such as the leadframe, thick ﬁlm substrate, and

the IC chip), and the ﬂexural modulus of the MC. When

the thermosetting MC is cured, it shrinks and applies stress

to the various elements in the package. This initial

manufacturing-induced stress increases at cold tempera-

tures. ‘‘Low stress’’ MC have been developed to address

this issue. Delamination and internal cracking can also

arise from this initial stress. During storage and transporta-

tion, particularly in ambients with high humidity, the plas-

tic absorbs water vapor from the environment. The water

vapor diffuses into the body of the package, ‘‘piling up’’ at

impermeable interfaces such as the back of the die attach

paddle, and the front of the IC chip. When the package is

exposed to the 220°C+ temperatures of SM solder reﬂow

or immersed in the 260°C wave solder, the water/vapor at

the interface rapidly expands and tends to force the MC

away from the interface.

If the adhesion of the MC is insufficient, the MC separates

(delaminates) from the leadframe, substrate or chip. The

extent of this separation may be partial or complete over

the interface, and is generally observed to initiate at corners

of the die attach paddle, at corners of the chip or lead ﬁn-

gers (tips of the interior ends of the leadframe leads to

July 1996 IPC-D-279

which the bond wires are connected to complete the circuit

from the IC bond pads).

The adhesion of the MC to the leadframe can be enhanced

by topical application of coupling agents or adhesion pro-

moters such as hexamethyldisilazane. If the strength of the

MC is insufficient, this degradation process progresses to

internal cracks in the MC, generally starting at sharp edges

and corners of the various elements in the package. If the

strength of the MC is inadequate, the cracks can progress

in the worst case to emerge on the surface of the package.

In milder cases, the cracks are internal and may terminate

on the lead ﬁngers. ANSI/IPC-SM-786 illustrates these

progressive stages. Because stress concentration is known

to be very strongly dependent upon the radius at the edges

of the die attach paddle, a suggested crack reduction tech-

nique is to increase the radius at these edges.

Another result of moisture absorption by the plastic is an

apparent decrease in the glass transition temperature (Tg)

of the MC. This change in Tg means that the moist plastic

expands and contracts more with changes in temperature

due to soldering processes than when the package was ini-

tially manufactured. Because the CTE of the MC is much

higher than the CTE of the chip, substrate or leadframe, the

MC expands and contracts with respect to these other ele-

ments, introducing additional stress at the interface. This

stress, in the case of ICs, can result in bond pad cratering

and is additional to the stress caused by the initial IC pack-

age curing process. Moist PSMCs exposed to temperature

cycling demonstrate a rapid progressive delamination and

product failure; dry PSMCs exposed to the same T/C con-

ditions show very slow progressive delamination. The con-

clusion is that vulnerable PSMCs can be robust to delami-

nation under T/C if kept dry.

F-6.1 Shorts and Resistive Shorts in PSMCs

In common with through hole (TH) components, PSMCs

suffer from metallic dendrites between the lead ﬁngers and

between leads. Dendrites are very thin, fragile metal

‘‘branches’’ which can be destroyed by casual contact or by

currents on the order of several hundred microamperes.

Dendrites form on surfaces and in cavities when the fol-

lowing conditions are present: continuous liquid water film

thicker than several molecules; hydrolyzable, ionizable

contaminant, particularly halides and acids, typically from

solder ﬂux but may also be extracted from the MC by the

diffusing moisture; metallic conductors, particularly silver,

copper, lead and tin (where halides are present, gold will

also dendrite); electrical DC bias at low current levels

between the conductors. See also IPC-TR-476A.

Liquid water ﬁlms occur in the package (or on the printed

board surface) when: the ambient humidity (relative

humidity) is high; the exposure duration is sufficient to

saturate the package (weeks to months at 25-35°C); there

is delamination, cracking or voiding in the package due to

initial manufacturing conditions or subsequent assembly

operations; there is power dissipated in the package insuf-

ﬁcient to keep the water in the vapor state.

Where the ambient temperature is suddenly reduced, we

would expect that internal moisture vapor will condense at

the interfacial voids. When cold parts are exposed to a

humid environment, we expect superﬁcial condensation.

Dendrites have been observed to be a result of: polyimide

ﬁlm delamination from the MC; voids in the MC due to

improper material handling or due to improper process

parameters during the molding process; cracks between

lead ﬁngers due to mechanical stresses applied during IC

manufacturing processes such as trim/form and thermal

shock stresses applied during IC manufacturing processes

such as solder dip; cracks between lead ﬁngers due to

printed board assembly processes such as TH insertion and

SM pick-and-place; delamination along lead ﬁngers and

leads which extend to the external surface of the package.

Cratering in silicone or GaAs ICs shows up under bonding

pads as cracks due to stresses introduced by the wire bond-

ing process. Cracks can grow during thermal shocks and

temperature cycling, allow metals such as aluminum to

move from the pad to the underlying semiconductor mate-

rial, and are manifested as a resistive short from the bond-

pad to or through the underlying junction.

F-6.2 Opens and Intermittent Opens in PSMCs

Opens have been traced to wirebreaks where the MC is

cracked, whether the crack originates from the chip, die

attach paddle, or lead ﬁnger.

Predictions by ﬁnite element analysis and data from pack-

aging stress test chips indicate the highest molding and

thermo-mechanical stresses will occur at the corners of ICs

and substrates.

Opens in metal conductors have been traced to stressed

metal patterns (thin ﬁlm cracking or TFC) in the corner of

IC chips. Experiments with planarized passivation/metal

patterns show metal damage when delamination is NOT

seen. Experiments with non-planarized patterns show metal

damage when delamination IS seen. Planarization of the

passivation/metal patterns was introduced in ICs to mini-

mize stresses transmitted to the patterns by the initial mold-

ing process. Minimized stresses are also the focus of the

‘‘low stress’’ holding compound formulations.

Corrosion and open metal conductors occur on IC chip

surfaces when the passivation is stressed and ruptured and

the package experiences the conditions described under

‘‘dendrites.’’ Where the passivation structure includes a

phosphorous pentoxide, P

, rich silicon oxide layer, a

liquid water ﬁlm can react with the P

, creating phos-

phoric acid, an excellent dissolver of the aluminum metal

conductors. This effect has been mitigated by incorporating

IPC-D-279 July 1996